A High-Performance Flexible Architecture for Cryptography

 

In Proceedings of the Workshop on Cryptographic Hardware and Embedded Systems 1999 (CHES99)

R. Reed Taylor and Seth Copen Goldstein

pages 231–245, Worcester, MA

August, 1999

Abstract


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@inproceedings{reed-ches99,
  author = {Taylor, R. Reed and Goldstein, Seth Copen},
  title = {A High-Performance Flexible Architecture for Cryptography},
  booktitle = {Proceedings of the Workshop on Cryptographic Hardware
     and Embedded Systems 1999 (CHES99)},
  address = {Worcester, MA},
  year = {1999},
  pages = {231-245},
  month = {August},
  abstract = {Cryptographic algorithms are more efficiently
     implemented in custom hardware than in software running on
     general-purpose processors. However, systems which use hardware
     implementations have significant drawbacks: they are unable to
     respond to flaws discovered in the implemented algorithm or to
     changes in standards. In this paper we show how reconfigurable
     computing offers high performance yet flexible solutions for
     cryptographic algorithms. We focus on PipeRench, a reconfigurable
     fabric that supports implementations which can yield better than
     custom-hardware performance and yet maintains all the flexibility
     of software based systems. PipeRench is a pipelined
     reconfigurable fabric which virtualizes hardware, enabling large
     circuits to be run on limited physical hardware. We present
     implementations for Crypton, IDEA, RC6, and Twofish on PipeRench
     and an extension of PipeRench, PipeRench+. We also describe how
     various proposed AES algorithms could be implemented on
     PipeRench. PipeRench achieves speedups of between 2x and 12x over
     conventional processors.},
  url = {http://www.cs.cmu.edu/~seth/papers/reed-ches99.pdf},
  keywords = {PipeRench,Reconfigurable Computing}
}

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