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REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references. 1 J. M. Arnold. The Splash 2 software environment. In D. A. Buell and K. L. Pocek, editors, Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, pages 88-93, Napa, CA, April 1993. 3 J. Babb, R. Tessier, and A. Agarwal. Virtual wires: Overcoming pin limitations in FPGA-based logic emulators. In D. A. Buell and K. L. Pocek, editors, Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, pages 142-151, Napa, CA, April 1993. 5 Jim Blinn. Fugue for MMX. IEEE Computer Graphics and Applications, pages 88-93, March-April 1997. 7 D. Cherepacha and D. Lewis. A datapath oriented architecture for FPGAs. In Second International ACM/SIGDA Workshop on FieM Programmable GateArrays, 1994. 11 Sanjaya Kumar et.al. Timing sensitivity stressmark. Technical Report CDRL A001, Honeywell, Inc., January 1997. http: //www. htc@honeywel 1. com/proj ects/acsbench/ 16 S.A. Guccione and M. J. Gonzalez. A data-parallel programming model for reconfigurable architectures. In D. A. Buell and K. L. Pocek, editors, Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, pages 79-87, Napa, CA, April 1993. 17 Paul N. Hilfinger. Silage: A language for signal processing, 1985. 18 T. Isshiki and W.W.-M. Dai. Bit-serial pipeline synthesis for multi-FPGA systems with C++. In Proceedings IEEE Symposium on FPGAS for Custom Computing Machines, pages 38-47, April 1996. 19 Charles E. Leiserson and James B. Saxe. Retiming synchronous circuitry. Algorithmica, 6(1):5-35, 1991. 21 I. Page and W. Luk. Compiling occam into FPGAs. In FP- GAs. International Workshop on FieM Programmable Logic and Applications, pages 271-283, Oxford, UK, September 1991. 22 B. Pottier and J.-L. Llopis. Revisiting Smalltalk-80 blocks: a logic generator for FleAs. In IEEE Symposium on FPGAs for Custom Computing Machines, pages 48-57, April 1996. 24 Bruce Schneier. The idea encrypfion algorithm. Dr. Dobb's Journal, 18(13):50, 52, 54, 56, December 1993. 26 J. Villasenor, B. Schoner, K. Chia, and C. Zapata. Configurable computing solutions for automatic target recognition. In J. Arnold and K. L. Pocek, editors, Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, pages 70-79, Napa, CA, April 1996.
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