PipeRench: A Reconfigurable Architecture and Compiler

 

IEEE Computer

Seth Copen Goldstein, Herman Schmit, Mihai Budiu, Srihari Cadambi, Matthew Moe, and R. Reed Taylor

33(4):70–77

April, 2000

Abstract


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@article{goldstein-ieee00,
  author = {Goldstein, Seth Copen and Schmit, Herman and Budiu, Mihai
     and Cadambi, Srihari and Moe, Matthew and Taylor, R. Reed},
  title = {{PipeRench}: A Reconfigurable Architecture and Compiler},
  journal = {IEEE Computer},
  year = {2000},
  volume = {33},
  number = {4},
  month = {April},
  pages = {70--77},
  url = {http://www.cs.cmu.edu/~seth/papers/goldstein-ieee00.pdf},
  abstract = {With the proliferation of highly specialized embedded
     computer systems has come a diversification of workloads for
     computing devices. General-purpose processors are struggling to
     efficiently meet these applications' disparate needs, and custom
     hardware is rarely feasible. According to the authors,
     reconfigurable computing, which combines the flexibility of
     general-purpose processors with the efficiency of custom
     hardware, can provide the alternative. PipeRench and its
     associated compiler comprise the authors' new architecture for
     reconfigurable computing. Combined with a traditional digital
     signal processor, microcontroller or general-purpose processor,
     PipeRench can support a system's various computing needs without
     requiring custom hardware. The authors describe the PipeRench
     architecture and how it solves some of the pre-existing problems
     with FPGA architectures, such as logic granularity, configuration
     time, forward compatibility, hard constraints and compilation
     time.},
  keywords = {Reconfigurable Computing,PipeRench}
}

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