Global Critical Path: A Tool for System-Level Timing Analysis

 

In Proceedings of the 44th ACM/IEEE Design Automation Conference

Girish Venkataramani, Mihai Budiu, Tiberiu Chelcea, and Seth Copen Goldstein

pages 783–786, San Diego, CA

Jun 1990

Abstract


download pdf


@inproceedings{dac07-gcp,
  author = {Venkataramani, Girish and Budiu, Mihai and Chelcea,
     Tiberiu and Goldstein, Seth Copen},
  title = {Global Critical Path: A Tool for System-Level Timing
     Analysis},
  booktitle = {Proceedings of the 44th ACM/IEEE Design Automation
     Conference},
  year = {2007},
  month = {Jun},
  address = {San Diego, CA},
  pages = {783--786},
  abstract = {An effective method for focusing optimization effort on
     the most important parts of a design is to examine those elements
     on the critical path. Traditionally, the critical path is defined
     at the RTL level, as the longest path in the combinational logic
     between clocked reisters. In this paper, we present a
     system-level timing analysis technique to define the concept of a
     Global Critical Path (GCP), for predicting system-level
     performance. We show how the GCP can be used as a theoretical and
     practical tool for understanding, summarizing and optimizing the
     behavior of highly concurrent self-timed circuits. We formally
     define the GCP and show how it can be constructed using a
     discrete event model and hardware profiling techniques. The GCP
     provides valuable insight into the control-path behavior of
     circuits and in finding system-level bottlenecks. We have
     incorporated the GCP construction and analysis framework into a
     high-level synthesis and simulation toolchain, thus enabling
     complete automation in modeling, analysis and optimization.},
  url = {http://www.cs.cmu.edu/~seth/papers/dac07-gcp.pdf},
  keywords = {Asychronous Circuits, CAD, Global Critical Path, System
     modeling, Hardware profiling},
}

Related Papers

CAD
Slack Analysis in the System Design Loop
Girish Venkataramani and Seth Copen Goldstein. In IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES-ISSS), pages 231–236, Oct 1990.
Area Optimizations for Dual-Rail Circuits Using Relative-Timing Analysis
Tiberiu Chelcea, Girish Venkataramani, and Seth Copen Goldstein. In Proceedings of the 13th IEEE International Symposium on Asynchronous Circuits and Systems, pages 117–128, Mar 1990.
Global Critical Path: A Tool for System-Level Timing Analysis
Girish Venkataramani, Mihai Budiu, Tiberiu Chelcea, and Seth Copen Goldstein. In Proceedings of the 44th ACM/IEEE Design Automation Conference, pages 783–786, Jun 1990.
Operation Chaining Asynchronous Pipelined Circuits
Girish Venkataramani and Seth Copen Goldstein. In ICCAD, Nov 1990.
Leveraging Protocol Knowledge in Slack Matching
Girish Venkataramani and Seth Copen Goldstein. In IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov 1990.
Modeling the Global Critical Path in Concurrent Systems
Girish Venkataramani, Tiberiu Chelcea, Mihai Budiu, and Seth Copen Goldstein. Carnegie Mellon University Technical Report No. CMU-CS-06-144, Aug 1990.
SOMA: A Tool for Synthesizing and Optimizing Memory Accesses in ASICs
Girish Venkataramani, Tobias Bjerregaard, Tiberiu Chelcea, and Seth Copen Goldstein. In IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES-ISSS), pages 231–236, Sep 1990.
Translating ANSI C to Asynchronous Circuits
Mihai Budiu, Girish Venkataramani, Tiberiu Chelcea, and Seth Copen Goldstein. In 10th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC '04), Apr 1990.
C to Asynchronous Dataflow Circuits: An End-to-End Toolflow
Girish Venkataramani, Mihai Budiu, Tiberiu Chelcea, and Seth Copen Goldstein. In IEEE 13th International Workshop on Logic Synthesis (IWLS), Jun 1990.
Molecules, Gates, Circuits, Computer
Seth Copen Goldstein and Mihai Budiu. In Molecular Nanoelectronics, Jan 1990.
MolSpice: Designing Molecular Logic Circuits
Seth Copen Goldstein, James Ellenbogen, David Almassiam, Matt Brown, Mark Cannarsa, Jesse Klein, Schuyler Schell, Geoff Washburn, and Matthew M Ziegler. In Ninth Foresight Conference on Molecular Nanotechnology, Nov 1990.
Static Profile-driven Compilation for FPGAs
Srihari Cadambi and Seth Copen Goldstein. In Proceedings of the 11th International Conference on Field-Programmable Logic and Applications, Aug 1990.
BitValue Inference: Detecting and Exploiting Narrow Bitwidth Computations
Mihai Budiu and Seth Copen Goldstein. Carnegie Mellon University Technical Report, Jun 1990. See budiu-europar00.
Efficient Place and Route for Pipeline Reconfigurable Architectures
Srihari Cadambi and Seth Copen Goldstein. In ICCD '00, Sep 1990.
BitValue Inference: Detecting and Exploiting Narrow Bitwidth Computations
Mihai Budiu, Majd Sakr, Kevin Walker, and Seth Copen Goldstein. In Proceedings of the 2000 Europar Conference, volume 1900, pages 969–979, Aug 1990. Also appeared as CMU CS Technical Report, CMU-CS-00-141, October 2000..
CPR: A Configuration Profiling Tool
Srihari Cadambi and Seth Copen Goldstein. In 7th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), pages 104, Apr 1990.
Asychronous Circuits
Heterogeneous Latch-Based Asynchronous Pipelines
Girish Venkataramani, Tiberiu Chelcea, and Seth Copen Goldstein. Asynchronous Circuits and Systems, International Symposium on, pages 83–92, 1990.
Slack Analysis in the System Design Loop
Girish Venkataramani and Seth Copen Goldstein. In IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES-ISSS), pages 231–236, Oct 1990.
Area Optimizations for Dual-Rail Circuits Using Relative-Timing Analysis
Tiberiu Chelcea, Girish Venkataramani, and Seth Copen Goldstein. In Proceedings of the 13th IEEE International Symposium on Asynchronous Circuits and Systems, pages 117–128, Mar 1990.
Global Critical Path: A Tool for System-Level Timing Analysis
Girish Venkataramani, Mihai Budiu, Tiberiu Chelcea, and Seth Copen Goldstein. In Proceedings of the 44th ACM/IEEE Design Automation Conference, pages 783–786, Jun 1990.
Operation Chaining Asynchronous Pipelined Circuits
Girish Venkataramani and Seth Copen Goldstein. In ICCAD, Nov 1990.
Self-Resetting Latches for Asynchronous Micro-Pipelines
Tiberiu Chelcea, Girish Venkataramani, and Seth Copen Goldstein. In Proceedings of the 44th ACM/IEEE Design Automation Conference, pages 986–989, Jun 1990.
Hardware Compilation of Application-Specific Memory Access Interconnect
Girish Venkataramani, Tobias Bjerregaard, Tiberiu Chelcea, and Seth Copen Goldstein. IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, 25(5):756–771, 1990.
Leveraging Protocol Knowledge in Slack Matching
Girish Venkataramani and Seth Copen Goldstein. In IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov 1990.
Modeling the Global Critical Path in Concurrent Systems
Girish Venkataramani, Tiberiu Chelcea, Mihai Budiu, and Seth Copen Goldstein. Carnegie Mellon University Technical Report No. CMU-CS-06-144, Aug 1990.
Tartan: Evaluating Spatial Computation for Whole Program Execution
Mahim Mishra, Timothy J Callahan, Tiberiu Chelcea, Girish Venkataramani, Mihai Budiu, and Seth Copen Goldstein. In 12th ACM International Conference on Architecture Support for Programming Languages and Operating Systems (ASPLOS), pages 163–174, Oct 1990.
Adding Faster with Application Specific Early Termination
David Ryan Koes, Tiberiu Chelcea, Charles Onyeama, and Seth Copen Goldstein. Carnegie Mellon University Technical Report No. CMU-CS-05-101, pages 20, May 1990.
SOMA: A Tool for Synthesizing and Optimizing Memory Accesses in ASICs
Girish Venkataramani, Tobias Bjerregaard, Tiberiu Chelcea, and Seth Copen Goldstein. In IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES-ISSS), pages 231–236, Sep 1990.
HLS Support for Unconstrained Memory Accesses
Girish Venkataramani, Tiberiu Chelcea, and Seth Copen Goldstein. In IEEE 14th International Workshop on Logic Synthesis (IWLS), Jun 1990.
Spatial Computation
Mihai Budiu, Girish Venkataramani, Tiberiu Chelcea, and Seth Copen Goldstein. In International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), pages 14–26, Oct 1990.
Translating ANSI C to Asynchronous Circuits
Mihai Budiu, Girish Venkataramani, Tiberiu Chelcea, and Seth Copen Goldstein. In 10th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC '04), Apr 1990.
C to Asynchronous Dataflow Circuits: An End-to-End Toolflow
Girish Venkataramani, Mihai Budiu, Tiberiu Chelcea, and Seth Copen Goldstein. In IEEE 13th International Workshop on Logic Synthesis (IWLS), Jun 1990.
Molecules, Gates, Circuits, Computer
Seth Copen Goldstein and Mihai Budiu. In Molecular Nanoelectronics, Jan 1990.
System Modeling
Global Critical Path: A Tool for System-Level Timing Analysis
Girish Venkataramani, Mihai Budiu, Tiberiu Chelcea, and Seth Copen Goldstein. In Proceedings of the 44th ACM/IEEE Design Automation Conference, pages 783–786, Jun 1990.
Global Critical Path
Slack Analysis in the System Design Loop
Girish Venkataramani and Seth Copen Goldstein. In IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES-ISSS), pages 231–236, Oct 1990.
Global Critical Path: A Tool for System-Level Timing Analysis
Girish Venkataramani, Mihai Budiu, Tiberiu Chelcea, and Seth Copen Goldstein. In Proceedings of the 44th ACM/IEEE Design Automation Conference, pages 783–786, Jun 1990.
Operation Chaining Asynchronous Pipelined Circuits
Girish Venkataramani and Seth Copen Goldstein. In ICCAD, Nov 1990.
Leveraging Protocol Knowledge in Slack Matching
Girish Venkataramani and Seth Copen Goldstein. In IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov 1990.
Modeling the Global Critical Path in Concurrent Systems
Girish Venkataramani, Tiberiu Chelcea, Mihai Budiu, and Seth Copen Goldstein. Carnegie Mellon University Technical Report No. CMU-CS-06-144, Aug 1990.
Hardware Profiling
Global Critical Path: A Tool for System-Level Timing Analysis
Girish Venkataramani, Mihai Budiu, Tiberiu Chelcea, and Seth Copen Goldstein. In Proceedings of the 44th ACM/IEEE Design Automation Conference, pages 783–786, Jun 1990.


Back to publications list