Researchers in Computer Architecture and Compilers

Explanation. This page is incomplete; please send corrections and additions to mihaib+who@cs.cmu.edu.
This page does not list students.

Name	Address	Picture	Work
W
Goto: all A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Philip Wadler	Researcher Avaya Labs research.avayalabs.com/user/wadler		XML, Java, functional languages, Haskell, Erlang, logic and programming dblp
Robert Wagner	Professor Duke U, CS cs.duke.edu/~raw		loop scheduling dblp
Larry Wall	wall.org/~larry		Perl, patch, rn dblp
Hong Wang	Researcher Santa Clara Intel Microarchitecture Lab intel.com/research/mrl/people/wang_h.htm		performance modelling, IA-64 dblp
Jun Wang	Professor U of Nebraska, Lincoln cse.unl.edu/~wang		high performance I/O architectures and storage systems, file systems, peer-to-peer systems, cluster and grid computing, internet server and technology, performance evaluation dblp
Wen-Hann Wang	manager of Emerging Platforms Lab Intel, Hillsboro		caches, computer architecture dblp
Nancy J. Warter-Perez	Professor California State U at Los Angeles calstatela.edu/faculty/nwarter/nwareter.htm		computer architecture, high-performance processor design, compiler design, instruction scheduling, EPIC processors dblp
John Wawrzynek	Professor UC Berkeley, CS cs.berkeley.edu/~johnw		BRASS, GARP dblp
Charles C. Weems	Professor U of Massachusetts, Amherst, CS cs.umass.edu/~weems		associative processing and architectures, parallel architectures for image processing, heterogeneous parallel architectures and compilers, integration of compile-time and run-time information dblp
Mark N. Wegman	IBM research.ibm.com/people/w/wegman		SSA, program optimization, programming languages dblp
William E. Weihl	CTO Akamai akamai.com/en/html/about/management_bw.html		DCPI, distributed and parallel computing, transaction processing, parallel programming languages, distributed garbage collection, replication, scheduling dblp
Markus Weinhardt	Researcher PACT, Germany markus-weinhardt.de		reconfigurable hardware compilation dblp
Stephanie Weirich	Professor U of Pennsylvania, CS cis.upenn.edu/~sweirich		programming languages, type theory, functional programming, logic, language-based security dblp
Daniel Weise	Microsoft Research research.microsoft.com/~daniel		program slicing, programming languages, VDG dblp
Uri C. Weiser	Director of Streaming Technology, Corporate Technology Group Intel intel.com/pressroom/kits/bios/uweiser.htm		Pentium, MMX dblp
David B. Whalley	Professor Florida State U cs.fsu.edu/~whalley		optimizing compilers, computer architecture, performance evaluation, real-time systems dblp
Reinhard Wilhelm	Professor U des Saarlandes, Saarbrucken, Germany rw4.cs.uni-sb.de/~wilhelm		static program analysis, embedded systems, security, animation and visualisation dblp
Maurice V. Wilkes	Advisor on research policy AT&T Research xorl.org/people/mvw Turing (1967) award, Eckert-Mauchly (1980) award		EDSAC, stored-program computers, microprogramming, caches, distributed memories dblp
Linda M. Wills	Professor Georgia Tech, ECE users.ece.gatech.edu/~linda		software understanding and retargeting, parallelization of portable multimedia applications, rapid prototyping of reconfigurable embedded software, binary reverse engineering dblp
Scott Wills	Professor Georgia Tech U, ECE users.ece.gatech.edu/~scotty		focal plane architectures, short wire architectures, VLSI and GSI semiconductor technology, portable multimedia supercomputers, image processing architectures dblp
Steve J. E. Wilton	Professor U of British Columbia, Canada ece.ubc.ca/~stevew		computer architecture, VLSI design dblp
Jeannette M. Wing	Professor Carnegie Mellon U, CS cs.cmu.edu/~wing		Software specification and verification, security, concurrent and distributed systems, programming languages, programming methodology dblp
Niklaus Wirth	Professor emeritus ETH Zurich cs.inf.ethz.ch/~wirth Turing (1984) award		Pascal, Modula-2, Oberon, CAD Tools for Hardware Design (Lola) dblp
Michael J. Wirthlin	Professor Brigham Young U, EE ee.byu.edu/faculty/wirthlin		reconfigurable hardware, JHDL dblp
Emmett Witchel	Professor U of Texas Austin CS cs.utexas.edu/users/witche		network processors, Mondriaan memory protection, machine learning for scheduling dblp
Mario Wolczko	Senior staff engineer Sun Research research.sun.com/people/mario		architectural support for object-oriented languages, Mushroom dblp
Tilman Wolf	Professor U of Massachusetts, Amherst ecs.umass.edu/ece/wolf		network processors, programmable routers dblp
Wayne Wolf	Professor Princeton U, EE ee.princeton.edu/~wolf		embedded computing systems, video architectures, multimedia information systems dblp
Andrew Wolfe	Senior Vice President and CTO SonicBlue sonicblue.com/default.asp?menu=Company&sub_menu=Key_Management&item=Andy_Wolfe		3D graphic accelerators dblp
Michael R. Wolfe	ST Microelectronics		parallelizing compilers, vectorization dblp
Martin D. F. Wong	Professor U of Illinois at Urbana-Champaign, ECE ece.uiuc.edu/faculty/faculty.asp?mdfwong		CAD, field-programmable systems, design and analysis of algorithms, combinatorial optimization dblp
David A. Wood	Professor U of Wisconsin-Madison, CS cs.wisc.edu/~david		computer architecture, parallel computing, memory systems, performance evaluation dblp
Jim Woodcock	Reader Oxford U, UK web.comlab.ox.ac.uk/oucl/work/jim.woodcock		software engineering, formal methods, mechanised proofs, security and safety, Z dblp
Jie Wu	Professor Florida Atlantic U cse.fau.edu/~jie		wireless networks and mobile computing, parallel and distributed systems, fault tolerant computing, load balancing in multicomputers, software engineering dblp
Youfeng Wu	Intel MRL intel.com/research/mrl/people/wu_y.htm		advanced compiler transformations, profile-guided optimizations, instruction-level parallelism, performance analysis with large workloads dblp