Explanation.
This page is incomplete; please send corrections and additions to mihaib+who@cs.cmu.edu.
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| Name | Address | Picture | Work |
|---|---|---|---|
| V | |||
| Goto: all A B C D E F G H I J K L M N O P Q R S T U V W X Y Z | |||
| Frank Vahid |
Professor UC Riverside, CS cs.ucr.edu/~vahid |
|
embedded systems design
dblp |
| Ramachandran Vaidyanathan |
Professor Louisiana State U ECE ece.lsu.edu/vaidy |
|
parallel algorithms and models, optical interconnects, dynamic reconfiguration, bus-based architectures dblp |
| Sriram Vajapeyam |
consultant cs.wisc.edu/~sriram (old) |
|
instruction issue, trace processors, superscalar processor design, run-time program vectorization dblp |
| Mateo Valero |
Professor U Politecnica de Catalunya, Barcelona, Spain people.ac.upc.es/mateo |
|
microarchitecture, compilers dblp |
| Murali R. Varanasi |
Professor U of South Florida csee.usf.edu/faculty/varanasi.htm |
|
coding theory, computer arithmetic, fault tolerant computing, VLSI design dblp |
| Stamatis Vassiliadis |
Professor Technical U of Delft, Netherlands einstein.et.tudelft.nl/~stamatis |
|
parallel embedded systems, computer architecture, hardware design, custom computing machines, computer arithmetic, low power design, Internet processing dblp |
| Jack Veenstra |
Silicon Graphics cs.rochester.edu/u/veenstra (old) |
|
MINT simulator
dblp |
| Alexander V. Veidenbaum |
Professor UC Irvine cecs.uci.edu/~alexv |
|
computer Architecture, compilers, embedded Systems dblp |
| Helmut Veith |
Professor U of Vienna, Austria dbai.tuwien.ac.at/staff/veith |
|
formal verification, model checking, temporal logic, security dblp |
| Andreas G. Veneris |
Professor U of Toronto, EE, Canada eecg.utoronto.ca/~veneris/AndreasVeneris.htm |
|
CAD tools for synthesis/optimization/testing, algorithms and theory dblp |
| Mary K. Vernon |
Professor U of Wisconsin-Madison, CS cs.wisc.edu/~vernon |
|
performance modeling
dblp |
| Narayanan Vijaykrishnan |
Professor Penn State U cse.psu.edu/~vijay |
|
low power VLSI, Java computing, computer architecture, embedded systems dblp |
| T. N. Vijaykumar |
Professor Purdue U, ECE dynamo.ecn.purdue.edu/~vijay |
|
ILP, Multiscalar, gated-Vdd dblp |
| Lucian N. Vintan |
Professor Lucian Blaga U of Sibiu, Romania webspace.ulbsibiu.ro/lucian.vintan/ |
|
branch prediction, value prediction, prediction techniques for ubiquitous computing dblp |
| Kees A. Vissers |
Trimedia, Netherlands ptolemy.eecs.berkeley.edu/~vissers (old) |
|
media processors, digital signal processing, hardware-software co-design dblp |
| Jan Vitek |
Professor Purdue U, CS cs.purdue.edu/homes/jv/index.html |
|
semantics and implementation of programming languages, semantics-based software engineering tools, secure software systems, customizable virtual machines, aliasing and ownership, real-time Java, cluster virtual machines, transactional programming languages dblp |
| Michael J. Voss |
Professor U of Toronto, EE, Canada eecg.utoronto.ca/~voss |
|
tools and compilers for parallel computing
dblp |
| Zvonko G. Vranesic |
Professor U of Toronto, EE, Canada eecg.utoronto.ca/~zvonko |
|
multiprocessor systems, VLSI systems and local area networks, NUMAchine dblp |