Researchers in Computer Architecture and Compilers

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Name	Address	Picture	Work
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Richard P. Gabriel	Sun Labs dreamsongs.com/Bio.html Allen Newell ((2004)) award		Lisp, CLOS dblp
Daniel D. Gajski	Professor UC Irvine cecs.uci.edu/~gajski		requirement/specification/design of embedded systems dblp
Abbas El Gamal	Professor Stanford U, ECE www-isl.stanford.edu/~abbas		information theory, communication complexity, VLSI design and CAD, programmable digital cameras dblp
Gregory R. Ganger	Professor Carnegie Mellon U, ECE ece.cmu.edu/~ganger		BSD FFS, exokernel, MEMS storage, DiskSim dblp
Jack Gannsle	editor Embedded Systems Programming ganssle.com		embedded systems
Guang R. Gao	Professor U of Delaware capsl.udel.edu/~ggao		computer architecture and systems, parallel and distributed systems, computational biology and bioinformatics, optimizing and parallelizing compilers, parallel programming, VLSI and application-specific system design dblp
Jean-Luc Gaudiot	Professor UC Irvine, EECS ece.uci.edu/faculty/gaudiot		parallel processing, functional languages, processor architecture, fault-tolerand computing dblp
Alan D. George	Professor U of Florida hcs.ufl.edu/~george		high-performance computer networks, parallel and distributed computing, high-performance computer architecture, fault-tolerant computing dblp
Manuel G. Gericota	Professor Polytechnic Instutute of Porto, ECE, Portugal dee.isep.ipp.pt/~mgg/indexe.html		design and test of digital systems, FPGA design and test, test methodologies for reconfigurable hardware systems, dynamic allocation of hardware resources in dynamically reconfigurable systems, reconfigurable systems management dblp
Rob Gerth	staff engineer Strategic CAD Labs, Intel		multi-processor verification dblp
Kourosh Gharachorloo	Google geocities.com/kourosh_info Maurice Wilkes (2004) award		high-end servers, Shasta, DASH, parallel computer architecture and software, commercial database and webserver performance dblp
Giorgio Ghelli	Professor U of Pisa, Italy di.unipi.it/~ghelli/ghelli.html		spatial logics, database programming languages, type theory dblp
Kanad Ghose	Professor Binghamton State U of New York, CS cs.binghamton.edu/~ghose		computer architecture, parallel and distributed processing, high-performance networking, VLSI systems, large-scale volume visualization dblp
Garth A. Gibson	Professor Carnegie Mellon U, CS cs.cmu.edu/~garth		RAID, storage, NASD dblp
Yossi Gil	Professor Israel Institute of Technology (Technion) cs.technion.ac.il/~yogi		software engineering, object-oriented pardigm, programming languages, parsing dblp
Roberto Giorgi	Professor U di Siena, Italy lucy.dii.unisi.it/~giorgi		coherence protocols for multiprocessors, behavior of user and system code, architectural simulation, multithreaded processors dblp
Tony Givargis	Professor UC Irvine cecs.uci.edu/~givargis		embedded system design and optimization dblp
Andy Glew	Intel Microprocessor Research Labs intel.com/research/mrl/people/glew_a.htm		microarchitecture, P6, MMX dblp
Neal Glew	Intel Research intel.com/research/people/bios/glew_n.htm		typed assembly language dblp
Maya Gokhale	Sarnoff Corp		reconfigurable hardware, C to HDL dblp
Seth Copen Goldstein	Professor Carnegie Mellon U, CS cs.cmu.edu/~seth		reconfigurable hardware, PipeRench, nanotechnology, lazy threads dblp
German S. Goldszmidt	IBM T. J. Watson cs.columbia.edu/~german (old)		distributed debugging, programming languages for distributed systems, e-commerce, distributed systems dblp
Ronaldo A. L. Gonçalves	Professor U Estadual de Maringa, Brazil din.uem.br/~ronaldo		parallel and high performance computing, parallel / superscalar / multithreaded architectures, performance evaluation of computer architecture, operating systems and compilers dblp
Georges Gonthier	Microsoft Research Cambridge research.microsoft.com/~gonthier		four-color theorem, programming languages, program verification, lambda calculus dblp
Antonio Gonzalez	Professor U Politecnica de Catalunya, Barcelona, Spain people.ac.upc.es/antonio		superscalar processors dblp
José González	Professor U de Murcia, Spain ditec.um.es/~joseg		value prediction, CC-NUMA, microarchitecture dblp
James R. Goodman	Professor U of Wisconsin-Madison, CS cs.wisc.edu/~goodman		high-performance computer architecture, memory systems, shared-memory multiprocessing dblp
David W. Goodwin	principal engineer Hewlett-Packard VSSAD group (old)		binary optimizations, Alpha performance analysis, Spike, executable interprocedural dataflow analysis dblp
Gerhard Goos	Professor U Karlsruhe, Germany i44w3.info.uni-karlsruhe.de/~ggoos		object-oriented programming, software components, compiler correctness, VERIFIX dblp
Ganesh Gopalakrishnan	Professor U of Utah, CS cs.utah.edu/~ganesh		Utah Verifier (UV), formal verification, asynchronous circuits and systems dblp
Michael J. C. Gordon	Professor Cambridge U, UK cl.cam.ac.uk/users/mjcg		HOL, formal verification dblp
James Gosling	Sun Labs java.sun.com/people/jag		Java, Emacs, NeWS window system dblp
Allan Gottlieb	Professor New York U, CS cs.nyu.edu/cs/faculty/gottlieb		Ultracomputer, parallel computers dblp
Ramaswamy Govindarajan	Professor Indian Institute of Science, Bangalore, India serc.iisc.ernet.in/~govind		ILP compilation, compilation techniques for architectural features, compilation for embedded/DSP processors, distributed shared memory, high performance architectures, programming models for DSP dblp
Susan L. Graham	Professor UC Berkeley, CS cs.berkeley.edu/~graham		parsing, compiler construction, gprof dblp
F. Gail Gray	Professor Virginia Tech, EE ecpe.vt.edu/faculty/gray.html		VHDL, high level modeling and design, high level test generation, fault tolerant systems, reconfigurable arrays, coding theory dblp
Jim Gray	Microsoft Research research.microsoft.com/~gray Turing (1998) award		transactions, databases, scalable servers dblp
Ronald I. Greenberg	Professor Loyola U, Chicago math.luc.edu/~rig		algorithms, parallel computation, computer architecture, VLSI, discrete mathematics dblp
Mark R. Greenstreet	Professor U of British Columbia CS, CA cs.ubc.ca/~mrg		VLSI design and verification, hybrid systems, dynamical systems, formal methods, asynchronous logic dblp
David Gregg	Professor Trinity College, Dublin, Ireland cs.tcd.ie/David.Gregg		interpreters, hardware compilation, compiling for instruction level parallelism, software pipelining, register allocation, branch prediction dblp
Ed Grochowski	Intel MRL intel.com/research/people/bios/grochowski_e.htm		Intel 486/Pentium/Pentium II/Itanium dblp
Thomas R. Gross	Professor ETH Zurich, Switzerland lst.inf.ethz.ch/people/trg.html		MIPS, Warp, iWarp, Fx dblp
Dan Grossman	Professor U of Washington, Seattle, CS cs.washington.edu/homes/djg		Cyclone, type theory dblp
Andrew Grove	Chairman of the Board Intel developer.intel.com/pressroom/kits/bios/grove.htm		semiconductors, Intel
Orna Grumberg	Professor Israel Institute of Technology (Technion) cs.technion.ac.il/users/orna		computer-aided verification of software and hardware, modularity, abstraction, refinement and counterexamples, symmetry, temporal logics, equivalences and preorders, distributed model checking, static analysis and model checking, coverage and vacuity, sat-based model checking, games for model checking, automata on infinite objects dblp
Dirk Grunwald	Professor U of Colorado, CS cs.colorado.edu/~grunwald		computer systems dblp
Michael K. Gschwind	Researcher IBM TJ Watson Research Center research.ibm.com/people/m/mikeg		dynamic compilation, binary translation, dynamic optimization, BOA, DAISY, system architecture, microarchitecture (RS6000 and S/390), compilation, power-modelling and power-aware architecture, application-specific processors, SOC dblp
P. Glenn Gulak	Professor U of Toronto, EE, Canada eecg.utoronto.ca/~gulak		VLSI in digital communications and signal processing, computer architecture, VLSI design and applications dblp
Carl A. Gunter	Professor U of Illinois at Urbana-Champaign CS www-faculty.cs.uiuc.edu/~cgunter/		security, networks, programming languages, software engineering dblp
Anoop Gupta	Senior Researcher Microsoft Research research.microsoft.com/~anoop		DASH, FLASH, multimedia dblp
Rajesh Gupta	Professor UC Irvine ics.uci.edu/~rgupta		algorithms for VLSI design automation, CAD for embedded and portable systems, computer architecture dblp
Rajiv Gupta	Professor U of Arizona, CS cs.arizona.edu/people/gupta		path-sensitive optimizations, compiler back-end dblp
Sumit Gupta	Tallwood Venture Capital cecs.uci.edu/~sumitg		SPARK, high-level synthesis, reconfigurable computing dblp
John R. Gurd	Professor U of Manchester, UK cs.man.ac.uk/cnc/staff/john/home.html		Manchester data-flow computer, parallel computer systems dblp
Samuel Z. Guyer	postdoc U of Texas Austin CS cs.utexas.edu/users/sammy		high-level optimizations, domain-specific optimizations, pointer analysis, automatic error checking, compiler-assisted memory management dblp