Researchers in Computer Architecture and Compilers

http://www.cs.cmu.edu/~mihaib/whoswho

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Name Address Picture Work
H
Goto: all A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Haldun Hadimioglu Professor
Polytechnic U, NY
cis.poly.edu/haldun
Haldun Hadimioglu high-speed optical switch design,
novel processor design,
memory hierarchy issues and I/O
dblp
Erik Hagersten Professor
Uppsala U, Sweden
docs.uu.se/~eh
Erik Hagersten shared-memory multiprocessor architectures,
cache-only memory architectures (COMA),
dynamic caching algorithms,
access pattern categorization,
dynamically adapting architectures
dblp
Ibrahim N. Hajj Professor
U of Illinois at Urbana-Champaign, ECE
ece.uiuc.edu/faculty/faculty.asp?i-hajj
Ibrahim N. Hajj CAD,
VLSI circuits and systems
dblp
Mary W. Hall Professor
U of Southern California
isi.edu/~mhall
? DIVA: Data-IntensiVe Architecture,
DEFACTO: Design Environment for Adaptive Computing TechnOlogy,
combining compile-time and run-time parallelization
dblp
Richard W. Hamming (deceased)
Bell Labs, Lucent/Naval Postgraduate School
cm.bell-labs.com/cm/cs/alumni/hamming
Turing (1968) award
Richard W. Hamming error correcting codes,
programming languages,
numerical analysis,
digital filters
dblp
Richard E. Hank Hewlett-Packard
crhc.uiuc.edu/IMPACT/people/graduated/Rick_Hank.html (old)
Richard E. Hank region-based compilation,
VLIW and EPIC compilation
dblp
Chris Hankin Professor
Imperial College, UK
doc.ic.ac.uk/chris.html
Chris Hankin program analysis,
safety critical systems,
coordination languages
dblp
Robert Harper Professor
Carnegie Mellon U, CS
www-2.cs.cmu.edu/~rwh
Robert Harper programming languages design/semantics/verification/implementation,
types in compilation,
logical frameworks and meta-languages,
scientific computing,
trustless grid computing
dblp
Tim Harris Researcher
Microsoft Research Cambridge, UK
research.microsoft.com/~tharris
Tim Harris programming languages,
managed runtime environments,
multi-threaded software,
transactional programming
dblp
Reiner Hartenstein Professor
U Kaiserslautern, Germany
hartenstein.de
Reiner Hartenstein reconfigurable computing/supercomputing/computer architectures/SoC,
FPGAs,
software/configware co-compilation,
hardware description languages,
microprogramming
dblp
Soha Hassoun Professor
Tufts U
eecs.tufts.edu/~soha
Soha Hassoun architectural and sequential optimizations,
timing analysis,
regularity extraction,
configurable computing
dblp
Scott Hauck Professor
U of Washington Seattle, EE
ee.washington.edu/faculty/hauck
Scott Hauck reconfigurable hardware,
Chimaera
dblp
John P. Hayes Professor
U of Michigan
eecs.umich.edu/~jhayes
John P. Hayes quantum computers,
massively parallel embedded systems,
computer architectures for safety-critical applications,
verification and testing of systems-on-a-chip,
automated synthesis and layout
dblp
Lei He Professor
U of Wisconsin-Madison
engr.wisc.edu/ece/faculty/he_lei.html
Lei He CAD for VLSI,
power-efficient circuits and computer systems,
numerical and combinatorial optimization
dblp
Xubin He Professor
Tennessee Tech U, ECE
ece.tntech.edu/hexb
Xubin He storage cache and disk I/O,
networked storage,
VHDL,
performance evaluation
dblp
Görel Hedin Professor
Lund Institute of Technology, Sweden
cs.lth.se/home/Gorel_Hedin/
Görel Hedin object-oriented languages and design,
domain-specific languages,
language implementation techniques,
interactive software development environments
dblp
Jan Heering Professor
Centrum voor Wiskunde en Informatica, Netherlands
homepages.cwi.nl/~jan
? compilers,
program restructuring,
software engineering
dblp
Eric C. R. Hehner Professor
U of Toronto, CS, Canada
cs.toronto.edu/~hehner
Eric C. R. Hehner formal methods of program design,
programming language semantics,
compiler design,
high-level circuit design
dblp
John Heinlein Transmeta
www-flash.stanford.edu/~heinlein
John Heinlein FLASH
dblp
Mark Heinrich Professor
University of Central Florida, CS
csl.cs.ucf.edu/~heinrich
Mark Heinrich active memory and I/O subsystems,
novel computer architectures,
parallel computer architecture,
data-intensive computing,
scalable cache coherence protocols,
multiprocessor design and simulation methodology,
hardware/software co-design
dblp
Nevin Heintze Agere Systems
cm.bell-labs.com/cm/cs/who/nch
Nevin Heintze set-based analysis,
pointer analysis,
verification
dblp
Laurie J. Hendren Professor
McGill U, Montreal, Canada
sable.mcgill.ca/~hendren
Laurie J. Hendren compilers,
pointer analyses,
McCAT,
Soot
dblp
John L. Hennessy Professor
Stanford U
www-flash.stanford.edu/~jlh
von Neumann Medal (2000), Eckert-Mauchly (2001) award
John L. Hennessy FLASH,
MIPS
dblp
Dana S. Henry Professor
Yale U, CS
thor.cs.yale.edu/~dana
Dana S. Henry Ultrascalar,
NIC,
FLIP
dblp
Thomas A. Henzinger Professor
U of California at Berkeley, ECE
www-cad.eecs.berkeley.edu/~tah
Thomas A. Henzinger system design/modeling/implementation/verification,
formal verification,
embedded systems
dblp
Martin C. Herbordt Professor
Boston U ?
people.bu.edu/herbordt
Martin C. Herbordt architecture and evaluation of massively parallel computers,
network caching
dblp
Maurice Herlihy Professor
Brown U CS
cs.brown.edu/people/mph/home.html
Maurice Herlihy distributed computing,
transactional memory,
lock-free programming
dblp
Paul N. Hilfinger Professor
UC Berkeley, CS
cs.berkeley.edu/~hilfingr
Paul N. Hilfinger Lisp,
Titanium (Java),
PRCS
dblp
Mark D. Hill Professor
U of Wisconsin-Madison, CS
cs.wisc.edu/~markhill
Mark D. Hill multiprocessors,
system architecture,
DSM,
cache memory
dblp
Sébastien Hily senior researcher
Intel Microprocessor Research Labs
irisa.fr/caps/people/hily/index_en.htm (old)
Sébastien Hily microprocessors,
computer architecture,
simultaneous multithreading
dblp
Michael Hind Researcher
IBM T. J. Watson
research.ibm.com/people/h/hind/
Michael Hind Jikes,
interprocedural analysis,
automatic parallelization,
dynamic optimization
dblp
Glenn J. Hinton director of IA-32 Microarchitecture Development
Intel
intel.com/pressroom/kits/bios/hinton.htm
Maurice Wilkes (2002) award
Glenn J. Hinton i960,
Pentium Pro,
Pentium II,
Pentium 4
Ralf Hinze Professor
U Bonn, Germany
/www.informatik.uni-bonn.de/~ralf
Ralf Hinze functional programming,
Haskel
dblp
C. Antony R. Hoare Microsoft Research, Cambridge, UK
research.microsoft.com/~thoare
Turing (1980) award
C. Antony R. Hoare programming methods and languages,
proof techniques for programs,
distributed computing,
hardware compilation,P
dblp
James C. Hoe Professor
Carnegie Mellon U, ECE
ece.cmu.edu/~jhoe
James C. Hoe operation-centric hardware synthesis,
term-rewriting systems,
network interfaces for clusters
dblp
Martin Hofmann Professor
Ludwig-Maximilians U Muenchen
tcs.informatik.uni-muenchen.de/~mhofmann
Martin Hofmann type theory,
principles of programming languages,
semantics,
category theory,
mathematical logic,
formal methods
dblp
H. Peter Hofstee IBM Austin Research Lab
? parallel algorithms,
microarchitecture,
timing analysis,
asynchronous circuits,
logic design
dblp
Urs Hölzle Professor
UC Santa Barbara, CS
cs.ucsb.edu/~urs
Urs Hölzle object-oriented programming languages,
software engineering,
OSUIF,
StrongTalk,
HotSpot JVM,
indirect branch prediction
dblp
Gerard J. Holzmann Bell Labs
cm.bell-labs.com/cm/cs/who/gerard
Gerard J. Holzmann SPIN,
model checking
dblp
Sangjin Hong Professor
State U of New York at Stony Brook ECE
ece.sunysb.edu/~snjhong/
Sangjin Hong low power VLSI,
digital signal processing,
embedded designs
dblp
Mark Horowitz Professor
Stanford U
www-flash.stanford.edu/~horowitz
Mark Horowitz FLASH,
CAD tools,
low power design
dblp
R. Nigel Horspool Professor
U of Victoria, Canada
cs.uvic.ca/~nigelh
R. Nigel Horspool compilers,
programming language (Java) implementations,
document conversion,
data compression,
XML,
HTML,
string search
dblp
Susan B. Horwitz Professor
U of Wisconsin-Madison, CS
cs.wisc.edu/~horwitz/horwitz.html
Susan B. Horwitz language-based programming environments,
program slicing differencing and merging,
static analysis,
interprocedural dataflow analysis
dblp
Antony L. Hosking Professor
Purdue U, CS
cs.purdue.edu/homes/hosking
Antony L. Hosking programming language design and implementation,
database and persistent programming languages,
object-oriented database systems,
dynamic memory management,
compiler optimization,
architectural support for programming languages and applications
dblp
Michael S. Hsiao Professor
Virginia Tech, ECE
visc.vt.edu/~mhsiao
Michael S. Hsiao test and verification,
CAD,
low-power architecture
dblp
Wilson C. Hsieh Professor
U of Utah, CS
cs.utah.edu/~wilson
? compilers,
programming languages,
systems,
architecture
dblp
Wei-Chung Hsu Professor
U of Minesotta, CS
www-users.cs.umn.edu/~hsu
Wei-Chung Hsu high performance processor and system architectures,
compiler optimizations,
runtime optimization systems
dblp
Y. Charlie Hu Professor
Purdue U, ECE
ece.purdue.edu/~ychu
Y. Charlie Hu distributed systems,
operating systems,
networking,
high performance computing
dblp
Yiming Hu Professor
U of Cincinnati
ececs.uc.edu/~yhu
Yiming Hu memory architecture,
high performance I/O systems,
file systems,
virtual memory,
high performance Web servers,
embedded systems,
parallel and distributed computing
dblp
Michael C. Huang Professor
U of Rochester, ECE
ece.rochester.edu/~mihuang
Michael C. Huang computer architecture,
processor microarchitecture,
energy-efficient system and processor architecture,
processing-in-memory
dblp
Ali R. Hurson Professor
Penn State U
cse.psu.edu/~hurson
Ali R. Hurson conventional and unconventional concurrent and parallel systems,
object oriented databases,
multi-databases,
hybrid dataflow architecture,
global information processing in mobile and wireless environments
dblp
Brad L. Hutchings Professor
Brigham Young U, EE
ee.byu.edu/faculty/hutch
Brad L. Hutchings application-specific processors,
run-time reconfiguration,
automatic target recognition
dblp
Kai Hwang Professor
U of Southern California
ceng.usc.edu/~kaihwang
Kai Hwang computer architecture,
digital arithmetic,
parallel processing,
distributed computing
dblp
Wen-mei W. Hwu Professor
U of Illinois Urbana-Champaign, ECE
crhc.uiuc.edu/Faculty/hwu.html
Maurice Wilkes (1998) award
Wen-mei W. Hwu IMPACT,
Trimaran,
computer architecture,
compilers
dblp