Researchers in Computer Architecture and Compilers

Explanation. This page is incomplete; please send corrections and additions to mihaib+who@cs.cmu.edu.
This page does not list students.

Name	Address	Picture	Work
A
Goto: all A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Martín Abadi	Professor U of California at Santa Cruz cse.ucsc.edu/~abadi/home.html		security, programming languages, specification and verification dblp
Tarek S. Abdelrahman	Professor U of Toronto, EE, Canada eecg.utoronto.ca/~tsa		Jasmine compiler, NUMAchine multiprocessor, POW system dblp
Mokhtar Aboelaze	Professor York U, Canada cs.yorku.ca/~aboelaze		omputer networks, mobile networks, computer architecture, special purpose architecture for image processing dblp
Jacob A. Abraham	Professor U of Texas, Austin, ECE cerc.utexas.edu/~jaa		VLSI design and test, formal verification, fault-tolerant computing dblp
Santosh G. Abraham	Sun Microsystems trimaran.org/car_group/santosh_abraham.html (old)		multiprocessor systems, optimizing compilers, performance evaluation, memory hierarchy simulation and design, Cheetah cache simulator, Trimaran, Elcor dblp
Miron Abramovici	Chief Technical Officer DAFCA Inc. bell-labs.com/user/miron (old)		CAD and testing, reconfigurable computing, FPGAs dblp
David Abramson	Professor Monash U, Australia csse.monash.edu.au/~davida		high performance computer systems design, software engineering tools for programming parallel and distributed supercomputers dblp
Shail (Gupta) Aditya	Senior Research Scientist Hewlett-Packard Labs, Compiler and Architecture Group trimaran.org/car_group/shail_aditya.html		PICO, Elcor, Id, parallel Haskell, parallel computing, compilers dblp
Ali-Reza Adl-Tabatabai	Intel MRL www-2.cs.cmu.edu/~ali		compiler optimizations, debugging dblp
Sarita Adve	Professor U of Illinois Urbana-Champaign, CS rsim.cs.uiuc.edu/~sadve		RSIM, memory consistency models dblp
Vikram S. Adve	Professor U of Illinois Urbana-Champaign, CS www-sal.cs.uiuc.edu/~vadve		link- and run-time compilation, POEMS, dHPF, compilers for distributed applications, LLVM dblp
Anant Agarwal	Professor MIT cag.lcs.mit.edu/~agarwal Maurice Wilkes (2001) award		RAW, Alewife, Virtual Wires dblp
Gul Agha	Professor U of Illinois at Urbana-Champaign, CS www-osl.cs.uiuc.edu/people?user=agha		Actors, concurrent programming, formal verification, software engineering, programming languages dblp
Dharma P. Agrawal	Professor U of Cincinnati ececs.uc.edu/~dpa		ad hoc and sensor networks, wireless and mobile networks, scheduling and task migration on NOWs, multithreaded execution of OO programs, parallelization of irregular FORTRAN loops dblp
Vishwani D. Agrawal	Professor Auburn U eng.auburn.edu/~vagrawal		SOC test, low-power VLSI design dblp
Alfred V. Aho	Professor Columbia U, CS cs.columbia.edu/~aho		compilers, AWK dblp
Alexander Aiken	Professor Stanford U, CS theory.stanford.edu/~aiken		type systems, static program analysis and abstract interpretation, constraint resolution algorithms, parallel programming, language design, domain specific languages, end user programming, visualization dblp
Anastassia Ailamaki	Professor Carnegie Mellon U, CS cs.cmu.edu/~natassa		computer architecture, databases dblp
David Al-Dabass	Professor Nottingham Trent U, UK ducati.doc.ntu.ac.uk/uksim/dad/webpage.htm		parallel and neural processing, clusters, parallel performance estimation dblp
David H. Albonesi	Professor Cornell U, ECE csl.cornell.edu/~albonesi		computer architecture, microprocessor design, power-aware microarchitecture, performance evaluation dblp
Nikitas A. Alexandridis	Professor George Washington U seas.gwu.edu/~alexan		advanced computer system architectures, high performance processors, parallel and distributed processing, computer vision and image processing/transmission, software prototyping for parallel systems & algorithms, heterogeneous computing dblp
Virgílio A. F. Almeida	Professor U Federal de Minas Gerais, Brazil dcc.ufmg.br/~virgilio		computing systems performance analysis and modeling, e-commerce dblp
Bowen Alpern	IBM T. J. Watson		Jalapeno (Java VM), SSA, theoretical models of hierarchical memory and parallelism, distributed and parallel computing, computational linear algebra dblp
Erik R. Altman	IBM T. J. Watson		DAISY, binary translation, software pipelining dblp
Rajeev Alur	Professor U of Pennsylvania cis.upenn.edu/~alur		design tools for embedded software, formal modeling and verification of reactive systems, model checking, hybrid systems, distributed computing, logic and automata theory dblp
Saman P. Amarasinghe	Professor MIT cag.lcs.mit.edu/~saman		compiler optimizations, computer architectures, software engineering, parallel computing dblp
Gene M. Amdahl	Retired chairman Commercial Data Servers Inc actscorp.com/acts/amdahl.htm Eckert-Mauchly (1987) award		pipelining, instruction look-ahead, cache dblp
Henrik Reif Andersen	Professor IT University of Copenhagen, Denmark itu.dk/people/hra		verification of concurrent and embedded systems, model checking, modal mu-calculus, models of concurrent systems, configuration problems and configuration software, implementation of embedded systems dblp
Tom Anderson	Professor U of Washington Seattle, CS cs.washington.edu/homes/tom		Internet, operating systems, scheduler activations dblp
David Andrews	Professor U of Kansas ittc.ku.edu/~dandrews		real time distributed, embedded systems, computer architecture dblp
Andrew W. Appel	Professor Princeton U cs.princeton.edu/~appel		compilers, functional programming languages dblp
James R. Armstrong	Professor Virginia Tech, EE ecpe.vt.edu/faculty/armstrong.html		modeling with hardware description languages, high level testing dblp
Mark G. Arnold	Professor Lehigh U cse.lehigh.edu/~marnold		computer architecture and arithmetic, hardware description languages dblp
Arvind	Professor MIT csg.lcs.mit.edu/Users/arvind		term-rewriting systems, dynamic dataflow, Id dblp
Krste Asanovic	Professor MIT cag.lcs.mit.edu/~krste		T0 vector microprocessor, low power, neural network implementations dblp
John Vincent Atanasoff	Professor (deceased) Iowa State U, CS cs.iastate.edu/jva/jva-archive.shtml		first digital computer
Peter M. Athanas	Professor Virginia Tech, EE ee.vt.edu/~athanas		computer architecture, VLSI, custom computing machines, parallel processing, hardware/software codesign, high-level synthesis, rapid prototyping of digital systems dblp
Darren C. Atkinson	Professor Santa Clara U cse.scu.edu/~atkinson		software engineering, compilers dblp
David I. August	Professor Princeton U, CS cs.princeton.edu/~august		compilers for predicated architectures dblp
Todd M. Austin	Professor U of Michigan eecs.umich.edu/~taustin		SimpleScalar, Diva (Dynamic Verification), microarchitecture design, low power computing, compiler design, computer system simulation and validation, performance analysis tools and techniques dblp
Eduard Ayguade	Professor U Politecnica de Catalunya, Barcelona, Spain people.ac.upc.es/eduard		parallelizing compilers, OpenMP, data placement optimization, parallel computing in Java, ILP dblp
James H. Aylor	Professor U of Virginia, EE ee.virginia.edu/profile.php?ID=2		system-level modeling, concurrent error detection, automatic test pattern generation, hardware description languages, VLSI system design dblp
Adnan Aziz	Professor U of Texas, Austin, ECE ece.utexas.edu/~adnan		design and verification of digital IC dblp