Explanation.
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Name | Address | Picture | Work |
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David Nagle |
Research Scientist Carnegie Mellon U, ECE ece.cmu.edu/~bassoon |
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Active storage, MEMS storage, NASD dblp |
Walid A. Najjar |
Professor UC Riverside, CS cs.ucr.edu/~najjar |
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reconfigurable computing, Cameron, multithreaded and parallel architectures and compilation techniques, interconnection networks and router architectures, SA-C dblp |
Farid N. Najm |
Professor U of Toronto, EE, Canada eecg.utoronto.ca/~najm |
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CAD tool for low-power and reliable VLSI circuits, high-level power modeling and estimation, low-power design, reliability analysis and prediction, CAD for SOI circuits dblp |
Ashwini K. Nanda |
Manages, Scalable Server Architecture Group IBM T. J. Watson research.ibm.com/people/a/ashwini |
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computer architecture, shared memory system design and performance dblp |
Lasse Natvig |
Professor Norwegian U of Science and Technology, Norway idi.ntnu.no/~lasse |
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computer architecture, parallel algorithms, architectures and programming, theoretical models of parallel computation, simulation of computer systems dblp |
George C. Necula |
Professor UC Berkeley, CS cs.berkeley.edu/~necula |
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Proof-Carrying Code (PCC), certifying compilation, translation validation dblp |
Brent E. Nelson |
Professor Brigham Young U, EE ee.byu.edu/faculty/nelson |
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hardware design and CAD, reconfigurable computing, VLSI design, Teramac dblp |
John von Neumann |
(deceased) Princeton U nationalacademies.org/history/members/neumann.html |
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von Neumann architecture, stored program concept, reliability theory, logic design, self-reproducing automata dblp |
Lionel M. Ni |
Professor Michigan State U mcast.cps.msu.edu/ni |
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local network, VLSI design automation, parallel compilers, computer system performance evaluation, fault-tolerant computing, parallel machines, cut-through switch architecture dblp |
Alexandru Nicolau |
Professor UC Irvine ics.uci.edu/~nicolau |
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paralellizing compilers, embedded systems dblp |
Michael T. Niemier |
Professor Georgia Tech, CS cc.gatech.edu/~mniemier |
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computer architecture, quantum celular automata dblp |
Rishiyur S. Nikhil |
Sandburst Corporation |
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*T, P-RISC, multithreading, ASIC design in high-level languages dblp |
David Notkin |
Professor U of Washington Seattle, CS cs.washington.edu/homes/notkin/ |
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dynamic detection of program invariants, symbolic model checking for software specifications, software engineering dblp |
Andreas G. Nowatzyk |
Professor Carnegie Mellon U, ECE cs.cmu.edu/~agn |
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single-chip multiprocessors, 3D cellular automata dblp |
Steven M. Nowick |
Professor Columbia U, CS cs.columbia.edu/~nowick |
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asynchronous digital circuits, VLSI CAD, low-power and high-performance digital design, logic synthesis, formal hardware verification dblp |
Jari Nurmi |
Professor U of Tampere, Finland cs.tut.fi/~nurmi |
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DSP, digital communication systems-on-chip dblp |
Kristen Nygaard |
(deceased) Oslo U, Norway ifi.uio.no/~kristen Turing (2001) award, von Neumann Medal (2001) |
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Simula, object-oriented programming dblp |