Researchers in Computer Architecture and Compilers

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Name	Address	Picture	Work
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Konrad Lai	Manager Intel Hillsboro Microarchitecture Labs intel.com/research/people/bios/lai_k.htm		microprocessor/memory/system architecture dblp
Monica S. Lam	Professor Stanford U suif.stanford.edu/~lam		SUIF, software pipelining, automatic parallelization, compilers dblp
Leslie Lamport	Microsoft Research lamport.org		Temporal Logic of Actions (TLA), Lamport clocks, Latex, parallel computation, metastability in asynchronous systems, formal methods, Byzantine agreement dblp
Butler W. Lampson	Microsoft Research research.microsoft.com/lampson		computer architecture, local area networks, raster printers, page description languages, operating systems, remote procedure call, programming languages and semantics, fault-tolerant computing, transaction processing, computer security, Alto personal distributed computing system, Xerox 9700 laser printer, two-phase commit protocol dblp
Anders Landin	Sun Microsystems sics.se/~landin (old)		multiprocessor architecture, memory systems, cache coherence, COMA, shared-memory application behaviour, architecture evaluation techniques, multiprocessor simulation dblp
Tomas Lang	Professor UC Irvine ece.uci.edu/faculty/lang.html		hardware for arithmetic dblp
Josep-Lluis Larriba-Pey	Professor U Politecnica de Catalunya, Barcelona, Spain people.ac.upc.es/larri		software trace cache, branch prediction, performance of numerical algorithms dblp
James R. Larus	senior researcher Microsoft Research research.microsoft.com/~larus		program measurement, fine-grain shared memory, Wisconsin Wind Tunnel, SPIM, PP, QPT, EEL, path profiling dblp
Rudy Lauwereins	Professor U of Leuven, Belgium lesbos.esat.kuleuven.ac.be/dpt_people/person.php3?id=3		embedded systems design, architectures/methods/tools for smart networked devices dblp
Luciano Lavagno	Professor Politecnico di Torino/Cadence, Italy polimage.polito.it/~lavagno		asynchronous circuit design and testing, hardware/software co-design of embedded systems dblp
Daniel M. Lavery	Intel Corporation		compilation for Itanium dblp
Edward D. Lazowska	Professor U of Washington, Seattle, CS cs.washington.edu/people/faculty/lazowska		design/implementation/analysis of high-performance computing and communication systems dblp
Gary T. Leavens	Professor Iowa State U CS cs.iastate.edu/~leavens		multiple dispatch, multijava, formal methods (JML) dblp
Alvin R. Lebeck	Professor Duke U, CS cs.duke.edu/~alvy		computer systems, memory systems, energy-efficient computing, fast memory simulation, ICE, CURIOUS dblp
Ben Lee	Professor Oregon State U, ECE hubbard.ece.orst.edu/~benl		software and architectural support for multithreading dblp
Corinna G. Lee	ATI Technologies eecg.utoronto.ca/~corinna (old)		UTDSP benchmark suite, performance of 3D graphics chips dblp
Edward A. Lee	Professor UC Berkeley, ECE ptolemy.eecs.berkeley.edu/~eal		Ptolemy, DSP, embedded systems dblp
Gyungho Lee	Professor University of Illinois at Chicago, ECE ece.uic.edu/People/lee.htm		DICE: cache-only memory multiprocessor, access-region cache: scalable memory pipeline, Amanita: system hardening, cache for embedded applications dblp
Hsien-Hsin Sean Lee	Professor Georgia Tech, ECE ece.gatech.edu/~leehs		microarchitecture, compilers dblp
Jaejin Lee	Professor Michigan State U cse.msu.edu/~jlee/		compilers, programming languages, HPC, memory consistency, processor-in-memory dblp
John A. N. Lee	Professor Virginia Tech, CS ei.cs.vt.edu/~janlee/Janlee.html		programming languages, compiler design, industry standards, software engineering, history of computing, computer ethics dblp
Peter Lee	Professor Carnegie Mellon U cs.cmu.edu/~petel		design/implementation/foundations of programming languages, language-based computer security, code certification and proof-carrying code, functional programming, formal semantics, type theory dblp
Ruby B. Lee	Professor Princeton U, EE ee.princeton.edu/~rblee		multimedia ISA, media processors and microarchitecture, secure information processing, processor architecture dblp
Sang-Jeong Lee	Professor Soonchunhyang U, Asan, Korea sjlee.sch.ac.kr/Default_eng.htm		ILP, optimizing compilers, value prediction dblp
Thomas H. Lee	Professor Stanford U, ECE www-smirc.stanford.edu/people.html		gigahertz-speed wireline, wireless integrated circuits, high-speed analog circuitry dblp
Miriam Leeser	Professor Northeastern U ECE ece.neu.edu/faculty/leeser.html		FPGA design and applications, Computer Arithmetic, Hardware/Software interfacing dblp
Charles Lefurgy	research staff member IBM Austin research.ibm.com/people/l/lefurgy		low energy computing, code compression dblp
K. Rustan M. Leino	Microsoft Research research.microsoft.com/~leino		programming tools, ESC/Java dblp
Charles E. Leiserson	Professor MIT supertech.lcs.mit.edu/~cel		Cilk, retiming, algorithms, supercomputing, interconnection networks, parallel computation dblp
Guy G. Lemieux	Professor U of British Columbia ECE, Canada ece.ubc.ca/~lemieux		multiprocessors, FPGAs dblp
Philip H. W. Leong	Professor Chinese University of Hong Kong cse.cuhk.edu.hk/~phwl		reconfigurable computing, digital systems, parallel computing, cryptography, signal processing dblp
Xavier Leroy	Senior Researcher INRIA, France cristal.inria.fr/~xleroy		type systems, module systems and static analyses, Ocaml, Linux threads dblp
Rainer Leupers	Professor Technische U Aachen, Germany iss.rwth-aachen.de/1_institut/dok/leupers.htm		embedded software tools, compilers for DSP and VLIW and network processors, code optimization, retargetable compilation, processor architecture dblp
Benjamin A. Levine	Professor U of Pittsburgh, ECE engr.pitt.edu/electrical/people/levine_benjamin.html		reconfigurable computing, high-level synthesis dblp
Steven P. Levitan	Professor U of Pittsburgh, EE kona.ee.pitt.edu/steve		CAD for free space optoelectronic, optoelectronic computing systems, VHDL simulation and synthesis, timing verification, design frameworks, VLSI architectures, parallel algorithm design dblp
Henry M. Levy	Professor U of Washington Seattle, CS cs.washington.edu/homes/levy		SMT, operating systems, Web dblp
David Lewis	Professor U of Toronto, EE, Canada eecg.utoronto.ca/~lewis		computer arithmetic, VLSI design, Transmogrifier, hierarchical FPGA architectures dblp
E. Christopher Lewis	Professor U of Pennsylvania cis.upenn.edu/~eclewis		compilers and programming languages, computer architecture, programming systems for scalable parallel machines dblp
Kai Li	Professor Princeton U, CS cs.princeton.edu/~li		PRISM, SHRIMP, extensible router, scalable I/O dblp
Zhiyuan Li	Professor Purdue U, CS cs.purdue.edu/people/li		optimizing compilers, interface between compilers and OS, performance evaluation of concurrent systems dblp
David J. Lilja	Professor U of Minesotta, EE www-mount.ee.umn.edu/~lilja/lilja.html		high-performance computer architecture, parallel processing, computer systems performance analysis, exploiting hardware-software interactions dblp
Sung Kyu Lim	Professor Georgia Tech, ECE users.ece.gatech.edu/~limsk		physical design automation algorithms and tools for 3D circuits and packages, quantum circuits, FPGA/FPCA/FPAA based reconfigurable systems dblp
Calvin Lin	Professor U of Texas, Austin, CS cs.utexas.edu/users/lin		compilers and languages, parallelism and scientific computing dblp
Christoph Lindemann	Professor Dortmund U, Germany rul-www.cs.uni-dortmund.de/~Lindemann/main.html		Petri nets, performance evaluation dblp
Daniel T. Ling	Corporate Vice President Microsoft Corp. microsoft.com/presspass/exec/ling/default.asp		user interfaces, computer graphics, video RAM, IBM America dblp
Dimitris Lioupis	Professor U of Patras, Greece aiolos.cti.gr/~lioupis		caches, microprocessor design, multimedia architectures dblp
Mikko H. Lipasti	Professor U of Wisconsin-Madison, ECE ece.wisc.edu/~mikko		value prediction, computer architecture, ILP, compiler optimization, runtime systems, operating systems dblp
G. Jack Lipovski	Professor U of Texas at Austin, ECE engr.utexas.edu/news/facstaff/pages/lipovski.cfm		artificial intelligence, computer architectures, microcomputers dblp
Dake Liu	Professor Linkoping U, Sweden isy.liu.se/~dake		system on chip integration, Application Specific Instruction set Processors (ASIP), DSP processors and accelerators, communication ASICs dblp
Yanhong Annie Liu	Professor State U of NY at Stony Brook, CS cs.sunysb.edu/~liu		programming languages, compilers and software systems, program analysis and transformation for incremental/parallel/concurrent computation, optimizing compilers dblp
Josep Llosa	Professor U Politecnica de Catalunya, Barcelona, Spain people.ac.upc.es/josepll		hardware and compiler support for ILP dblp
Jien-Chung Lo	Professor U of Rhode-Island ele.uri.edu/faculty/lo.html		fault-tolerant computing, distributed networked computing, reliable logic circuit designs, VLSI testing dblp
Gabriel H. Loh	Professor Georgia Tech, CS cc.gatech.edu/~loh		high-performance processor microarchitecture, branch prediction dblp
Ronald J. Lomax	Professor (emeritus) U of Michigan www-personal.engin.umich.edu/~rjl		processor design dblp
Rita Loogen	Professor Philipps-Universitat, Marburg, Germany mathematik.uni-marburg.de/~loogen		declarative parallel programming, integration of functional and logic programming languages, parallel implementation of functional languages dblp
P. Geoffrey Lowney	Director, Compiler and Architecture Advanced Development Intel Architecture Group intel.com/pressroom/kits/bios/plowney.htm		compilers for Alpha and Itanium, Multiflow, Spike dblp
Shih-Lien Lu	Intel MRL ece.orst.edu/~sllu (old)		counterflow pipelines, self-timed circuits and systems design, VLSI systems, computer arithmetic, computer architecture dblp
Yung-Hsiang Lu	Professor Purdue U, ECE ece.purdue.edu/~yunglu		energy-efficient and low-power systems, operating systems, wireless applications, reconfigurable architectures, VLSI design automation, embedded systems dblp
David Luick	IBM Rochester		VLIW
Chi-Keung Luk	Intel cs.cmu.edu/~luk (old)		data prefetch for pointer code dblp
Wayne Luk	Senior lecturer Imperial College, London, UK doc.ic.ac.uk/~wl		run-time reconfigurable architectures, library-based compilation techniques dblp
Steven Lumetta	Professor U of Illinois Urbana-Champaign, ECE crhc.uiuc.edu/~steve		high-performance networking and computing, hierarchical systems, parallel runtime software dblp