Michael K. Papamichael        

 

 
  
  |  
  |  
  |  
  |  
 


FCCM
2013
Eric S. Chung and Michael K. Papamichael. "ShrinkWrap: Compiler-Enabled Optimization and Customization of Soft Memory Interconnects", To appear in 21st IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM 2013), Seattle, WA, April 28-30, 2013. View pdf online
FPGA
2012
Michael K. Papamichael and James C. Hoe. "CONNECT: Re-Examining Conventional Wisdom for Designing NoCs in the Context of FPGAs", 20th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2012), Monterey, CA, February 22-24, 2012. View pdf online
FPGA
2012
Eric Chung, Michael Papamichael, Gabriel Weisz, James Hoe and Ken Mai. "Prototype and Evaluation of the CoRAM Memory Architecture for FPGA-Based Computing", 20th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2012), Monterey, CA, February 22-24, 2012. View pdf online
MEMOCODE
2011
Michael K. Papamichael. "Fast Scalable FPGA-Based Network-on-Chip Simulation Models", 9th ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2011), Cambridge, UK, July 11-13, 2011. View pdf online
NOCS
2011
Michael K. Papamichael, James C. Hoe, and Onur Mutlu. "FIST: A Fast, Lightweight, FPGA-Friendly Packet Latency Estimator for NoC Modeling in Full-System Simulations", 5th ACM/IEEE International Symposium on Networks-on-Chip (NOCS 2011), Pittsburgh, PA, May 1-4, 2011. View pdf online
Micro Top Picks
2011
Yoongu Kim, Michael Papamichael, Onur Mutlu, and Mor Harchol-Balter. "Thread Cluster Memory Scheduling", IEEE Micro, Special Issue: Micro's Top Picks from 2010 Computer Architecture Conferences (MICRO TOP PICKS), Vol. 31, No. 1, January/February 2011. View pdf online
MICRO
2010
Yoongu Kim, Michael Papamichael, Onur Mutlu, and Mor Harchol-Balter. "Thread Cluster Memory Scheduling: Exploiting Differences in Memory Access Behavior", International Symposium on Microarchitecture (MICRO-43), Atlanta, GA, Dec 4-8, 2010. View pdf online
ACM TRETS
2009
Eric S. Chung, Michael K. Papamichael, Eriko Nurvitadhi, James C. Hoe, Babak Falsafi, and Ken Mai. "ProtoFlex: Towards Scalable, Full-System Multiprocessor Simulations Using FPGAs", ACM Transactions on Reconfigurable Technology and Systems, 2009. View pdf online
WARP
2008
Eric S. Chung, Michael Papamichael, Eriko Nurvitadhi, James C. Hoe, Babak Falsafi, and Ken Mai. "An MP Architectural Exploration Vehicle using FPGA-accelerated Simulation", 3rd Workshop on Architectural Research Prototyping, Beijing, China, June 21-22, 2008
FORTH
2007
M. Papamichael. "Network Interface Architecture and Prototyping for Chip and Cluster Multiprocessors", FORTH-ICS Technical Report, TR392-07-2007, July 2007 View pdf online
SAMOS VII
2007
V. Papaefstathiou, D. Pnevmatikatos, M. Marazakis, G. Kalokairinos, A. Ioannou, M. Papamichael, S. Kavadias, G. Mihelogiannakis and M. Katevenis. "Prototyping Efficient Interprocessor Communication Mechanisms", Accepted for presentation at the 7th International Symposium on Systems, Architectures, MOdeling and Simulation (SAMOS), Samos, Greece, July 16-19, 2007 View pdf online
HiPEAC
2006
V. Papaefstathiou, G. Kalokairinos, A. Ioannou, M. Papamichael, G. Mihelogiannakis, S. Kavadias, E. Vlachos, D. Pnevmatikatos and M. Katevenis. "An FPGA-based Prototyping Platform for Research in High-Speed Interprocessor Communication", 2nd Industrial Workshop of the European Network of Excellence on High-Performance Embedded Architecture and Compilation (HiPEAC), Eindhoven, Netherlands, October 17, 2006 View pdf online
FORTH
2006
G. Kalokairinos, V. Papaefstathiou, A. Ioannou, D. Simos, M. Papamichael, G. Mihelogiannakis, M. Marazakis, D. Pnevmatikatos, and M. Katevenis. "Design and Implementation of a Multi-Gigabit NIC and a Scalable Buffered Crossbar Switch", FORTH-ICS Technical Report, TR376-04-2006, April 2006 View pdf online