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Yirng-An Chen's Publications

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Journals

Yirng-An Chen, Randal E. Bryant,
``An Efficient Graph Representation for Arithmetic Circuit Verification'',
in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2001.
Randal E. Bryant, Yirng-An Chen,
``Verification of Arithmetic Circuits Using Binary Moment Diagrams,'',
in International Journal on Software Tools for Technology Transfer, 2001.
Yirng-An Chen, Young-Long Lin, and Long-Wen Chang,
"A Systolic Algorithm for the K-Nearest Neighbors Problem",
In IEEE Tran. on Computers, Vol. 41, No. 1, Jan. 1992,
pp.103-108.

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Conferences

Yu-Chin Hsu, Bassam Tabbara, Yirng-An Chen, Furshing Tsai,
``Advanced Techniques for RTL Debugging'',
In 40th Design Automation Conference, Jun. 2003.
Yirng-An Chen, Fang-Sung Chen,
``Algorithms for Compacting Error Traces'',
in Proceeding of Asian-Pacific Design Automation Conference ASPDAC '03, Jan., 2003.
Chien-Pang Lu, Wen-Chien Liu, Yirng-An Chen,
``High Probability High Density State Traversal'',
In IEEE 10th International Workshop on Logic & Synthesis, June, 2001.
Jiunn-Chern Chen, Yirng-An Chen,
``Equivalence Checking of Integer Multipliers'',
In Proceeding of Asian-Pacific Design Automation Conference ASPDAC '01, Jan., 2001.
Yirng-An Chen, Randal E. Bryant
``Verification of Floating Point Adders'',
Proceeding of 10th International Conference of Computer Aided Verification, pp.488-499, June, 1998.
Bwolen Yang, Yirng-An Chen, Randal E. Bryant, David R.
O'Hallron,
"Space- and Time-Efficient BDD Construction via Working Set Control",
in Proceedings of ASP-DAC'98, Feb. 10-13, 1998, pp. 423-432.
Yirng-An Chen, Randal E. Bryant,
"*PHDD: An Efficient Graph Representation for Floating Point Circuit Verifica
tion"
In Proceedings of International Conference
of Computer-Aid Design, Nov. 1997, pp. 2-7.
Yirng-An Chen, Randal E. Bryant, "ACV: An
Arithmetic Circuit Verifier",
In Proceedings of International Conference
of Computer-Aid Design, Nov. 1996, pp. 361-365.
Yirng-An, Chen, E. Clark, P.-H. Ho, Y. Hoskote, T. Kam, M. Khaira,
J. O'Leary, X. Zhao,
"Verification of all circuits in a floating-point unit using
word-level model checking",
In Proceedings of Formal Methods in Computer-Aid
Design, Nov. 1996, pp.19-33.
Randal E. Bryant, Yirng-An Chen,
"Verification of Arithmetic Circuits with Binary Moment Diagrams",
In 32nd Design Automation Conference, June. 1995, pp. 535-541
Yirng-An Chen and Young-Long Lin, A New Global Router for ASIC Design Based on Simulated Evolution, In
1989 Proceedings of International Symposium on VLSI, Technology, Systems and Applications, pp.261-265.

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Technical Reports

Yirng-An Chen, Randal E. Bryant,
"*PBHD: An Efficient Graph Representation for Floating Point Circuit Verification",
Tech. Report CMU-CS-97-134, School of Computer Science,
Carnegie Mellon University, 1997.
Yirng-An Chen, Bwolen Yang, Randal E. Bryant,
"Breadth-First with Depth-First BDD Construction: A Hybrid Approach",
Tech. Report CMU-CS-97-120, School of Computer Science,
Carnegie Mellon University, 1997.
Randal E. Bryant, Yirng-An Chen,
"Verification of Arithmetic Functions with Binary Moment Diagrams",
Tech. Report CMU-CS-94-160, School of Computer Science,
Carnegie Mellon University, 1994.

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Awards

Randal E. Bryant, Yirng-An Chen, "Verification of Arithmetic Circuits
with Binary Moment Diagrams" --Best paper award of
32nd Design Automation Conference.