Reconfigurable Computing Seminar
Carneigie Mellon University

15-828/18-847 Spring 1998 January 12
Course Information



The purpose of this course is to prepare students for and engage in research on reconfigurable computing. During the course students will read, review, and discuss papers both in the fundamental areas of reconfigurable computing (FPGAs, CAD, computer architecture, and compilers) and on recent research in the area. In addition, we will explore the area through several labs and a semester long research project.



Prof. Seth Copen Goldstein
7122 Wean Hall, x8-3828
Dr. Herman Schmit
2108 Hammershlag Hall, x8-6470

Course Secretary:

Barbara Grandillo
8212 Wean Hall, x8-7550

Seminar Time and Location:

MW 1:30-2:50, WeH 5409B
Seth Copen Goldstein, Herman Schmit

Course Web page:

Course Requirements

Your participation in the course will involve the following forms of activity: attending and participating in the seminars, reading and reviewing papers, doing the labs, scribing, and a research project.

The seminar is focused on reading and discussing papers on the foundations for and the recent research on reconfigurable computing. As such, there will be two or three papers assigned for each class. The papers will be reviewed prior to and then discussed in class. For each class there will be a scribe, who will be responsible for creating a written reference for the class. In addition to the class discussions students will complete two directed labs and a research project.


The approximate grade break down is as follows:

Class Participation 40%  
Two Labs 20%  
Research Project 40%  

Class participation includes oral participation in class, scribe notes, paper reviews, and class presentations. If you disagree with a grade for a lab1 you should submit your request for a regrade in writing to one of the instructors.

Paper Reviews

Students are expected to hand in reviews of the assigned papers by midnight of the day on which the paper will be discussed. The review should be a synthesis of a peer review for a conference or journal paper[*] and a book report. It should contain four sections:

The title and author of the paper being reviewed and your name.
A short paragraph summarizing the paper demonstrating that you understand the paper.
Major Comments
Here you should comment on the papers main contribution, technical approach, analysis, results, conclusions, etc.
In this section describe any things that you'd attempt to do next if you were the author of this paper. What important, unanswered questions does this paper raise? How does this paper relate to other papers that we've read?

Reviews should be submitted as HTML documents which contain the equivalent of 1 page of text, in other words, less than 3200 bytes in the body of the document. The template for a review can be retrieved from

where x is the class number and name is the name we assign to each paper. Copy the template to your directory, insert your review and then handin the paper by running the handin script. (See Section 4.3.)

Occasionally, we will provide you with a series of questions that should guide the review. In this case, you can ignore the review format described above and simply answer the questions in the review template.

Scribe Notes

As there is no one complete reference for reconfigurable computing we will build a reference as we go along by scribing each seminar and publishing the scribe notes on the Web. Each student will scribe 2 or 3 lectures (depending on the class size). The scribe should send a draft to the designated instructor within three days of the seminar. After meeting with instructor, the scribe will make revisions and have a final version ready one week after the seminar.

Scribe notes will be published on the web and given out in class. Both the html and postscript for the scribe notes should be placed in /afs/cs/academic/class/15828/scribe/week-x/. If the notes are written in something other than html, place the source for the notes in /afs/cs/academic/class/15828/scribe/week- x/src/ along with a Makefile.



The class has lab space in both HH A104 and Wean 3701. In HH A104 there are two PCs with Wildfire boards, there is one PC with Altera support. In Wean 3701, we have one Wildfile board and one PC with Altera support. Both labs requires a card key, so if you think you need access to a machine there, please contact one of the instructors.

Software and ECE accounts

If you don't have access to ece afs space, you need to get an ece student account immediately as all of the software needed for lab 1 requires afs access to ece directories.

If you are planning to run the software from your own machine you will have to make sure that resolve.conf has in it, or that /etc/hosts has the ECE license server machines (encore and knave) listed in it. You will know that you need to make these changes when the software does not work because it can't get a license.

Electronic Hand-in

  As soon as possible you should run the program
It will create the directories into which your reviews and labs will be deposited when you run the handin script. When you are ready to hand in an assignment, you will simply run the program ``handin <x>'' from the directory containing your assignment. In other words, to hand in the reviews from class 3, you would run handin 3 from the directory that contained your reviews.

Graded assignments will be handed back electronically as well. If your userid is seth then to look at our comments (and your grade) on lab1 you would go to the directory /afs/cs/academic/class/15828/handin/seth/lab1/handback.


The following is a proposed schedule of seminar topics and other due dates.

Class Date Day   Other
1 1/12 Mon Intro/Admin/Etc. Hand out Lab1
2 1/14 Wed Reconfigurable Computing  
3 1/19 Mon Intro to FPGA Architectures  
  TBA TBA Verilog  
4 1/21 Wed Adders/Multipliers I  
5 1/26 Mon Adders/Multipliers II  
6 1/28 Wed SPLASH and DNA String Matching  
  1/30 Fri   Lab 1 due
7 2/2 Mon Systolic Architectures/Apps Handout Lab2
8 2/4 Wed Systolic Systems  
9 2/9 Mon CVH  
10 2/11 Wed Function Unit Systems  
11 2/16 Mon Partial Reconfiguration Handout Sample Projects
12 2/18 Wed DSP  
  2/21 Fri   Lab 2 due
13 2/23 Mon Programming Languages  
14 2/25 Wed Selected Student Presentations  
  3/2 Mon
Mid-semester Break
15 3/4 Wed FPGA Logic Cells Project Description Due
16 3/9 Mon FPGA Tech Mapping  
17 3/11 Wed Loop Transforms  
18 3/16 Mon FPGA Placement  
19 3/18 Wed Retiming  
  3/23 Mon
Spring Break
  3/25 Wed
Spring Break
20 3/30 Mon FPGA Interconnect/Routing I  
21 4/1 Wed FPGA Interconnect/Routing II  
22 4/6 Mon HW/SW Co-Design/Partitioning Progress Report Due
23 4/8 Wed Synthesis  
24 4/13 Mon Partial Evaluation  
25 4/15 Wed TBA  
26 4/20 Mon FPGA Generators  
27 4/22 Wed Cryptography  
28 4/27 Mon Logic Emulation  
29 4/29 Wed TBA  
Final Project Presentations
  5/7     Final Project Due

About this document ...

This document was generated using the LaTeX2HTML translator Version 97.1 (release) (July 13th, 1997)

Copyright © 1993, 1994, 1995, 1996, 1997, Nikos Drakos, Computer Based Learning Unit, University of Leeds.

The command line arguments were:
latex2html -split 0 -show_section_numbers -no_navigation -t Reconfigurable Computing Seminar Syllabus syllabus.tex.

The translation was initiated by Seth Copen Goldstein on 1/13/1998


For a nice article on how to review a technical article, see

Seth Copen Goldstein