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18-545 Advanced Digital Design Project

Baseline JPEG Encoder Implementation

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We, as team Final Fantasy, had come into the course without any knowledge of codesign and JPEG encoding scheme, and was thrown into the digital design project of designing a JPEG encoder processor using codesign with FPGA and an 8-bit embedded processor. Right away we determined that the DCT will go on the FPGA, and the rest will go on the CPU, since we want to place the most time consuming section on FPGA.

Final Report

  1. Introduction
  2. Design Goals/Summary of Architectural Features
  3. Mesurement Strategy
  4. Implementation Strategy
  5. Performance Against Schedule
  6. Technical Lessons Learned
  7. CAD Tools Lessons Learned
  8. Codesign Lessons Learned
  9. Project Lessons Learned
  10. Cosimulator Functionality
  11. Conclusion

Final Presentation

Team Member listing, by last name:

Lin, Chen-Li (Tom)

Team Leader
ECE Senior
(412) 802-0355
Back to Top

Lin, Yen-Pang (Jeff)

ECE 5th Year Senior
(412) 802-6328

Wang, Dong

ECE Grad student
Wean Hall 7205
(412) 268-3620 (Office)
(412) 661-2138 (Home)

Yussof, Salman

ECE Senior
(412) 862-2808