Systolic Computing

Reconfigurable Computing Seminar 2/2/98

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1. Systolic Computing
2. Talks
3. Lab 2
4. PipeRench Tutorial
5. Systolic Computing
6. Systolic Computing
7. Motivation
8. Using VLSI Effectively
9. Regular Interconnect
10. Eliminating the VN Bottleneck
11. Balancing I/O and Compute
12. Exploiting Concurrency
13. Systolic Architectural Model
14. Systolic Is Good RC Starting Point.
15. One Big Difference
16. Mapping Approach
17. Various Possible Implementations
18. Bag of Tricks
19. Bogus Attempt at Systolic FIR
20. Bogus Attempt: Outer Loop
21. Bogus Attempt: Outer Loop-2
22. Bogus Attempt: Outer Loop-2a
23. Bogus Attempt: Outer Loop-3
24. Attempt at Systolic FIR
25. Outer Loop
26. Optimize Outer Loop Preload-repeated Value
27. Optimize Outer Loop Broadcast Common Value
28. Optimize Outer Loop Retime to Eliminate Broadcast
29. How It Works
30. FIR details
31. FIR details
32. FIR Summary

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