iWarp processors communicate with neighboring processors over structures
called {\em logical channels}, which can be chained together to form {\em
pathways}\cite{iwarp:arch}.  Although the physical connection pattern of the
iWarp is a 2D torus, logical channels and pathways allow for logical
connection patterns such as rings, trees, and hypercubes. Logical channels
can be created and destroyed dynamically, and each iWarp processor can
support at most 20 logical channels at any point in time.

We implement the primitives of the anonymous destination message
passing model on iWarp using a unidirectional ring, constructed from
logical channels, that passes through all processors.  The reason for
choosing such a simple network was to have the barrier algorithm
consume as few communications resources as possible.

Each iWarp processor contains an {\em address match CAM} (content
addressable memory) with four entries that can be set by the
programmer. When a special word called a {\em message header} arrives
over a pathway to a processor, the match CAM hardware automatically
compares the message header to its four entries.  If any of the
entries matches the message header, the message header is held in the
pathway (this is called {\em splitting a pathway}), and the
computation agent is signaled. The computation can consume an
arbitrary number of words from the pathway, and then allow the
remainder of the unconsumed words to proceed over the pathway to the
next processor (this is called {\em joining a pathway}).