Resume for Mahim Mishra
                       -----------------------

Contact Information:
-------------------
  Computer Science Department
  School of Computer Science
  Carnegie Mellon University
  Pittsburgh, PA 15213-3891
  
  E-mail		: mahim+resume@cs.cmu.edu
  Phone			: +1-412-268-3562
  Fax			: +1-412-268-5576

Immigration Status:
------------------
  Country of Citizenship: India
  Visa Status		: F1
  Work Authorization	: Yes

Research Interests: 
------------------ 
Computer architecture, reconfigurable computing, asynchronous
circuits, high-level synthesis, CAD algorithms, defect tolerance, VLSI
test methods, electronic nanotechnology, and simulation and modeling.

  Please see
	www.cs.cmu.edu/~phoenix
	www.cs.cmu.edu/~mahim/research.html
  for more information.

Education:
---------
Sep 2001-present  Carnegie Mellon University
                  Ph.D. Program in Computer Science

Sep 1997-May 2001 Indian Institute of Technology, Kanpur
                  Bachelor of Technology in Computer Science and 
                  Engineering

Awards and Academic Honors:
--------------------------
1. Awarded the Indian Institute of Technology, Kanpur's 
   "Director's Gold Medal for Outstanding All-round Achievement,
   Organizational Ability and Leadership" for 2001. The medal is 
   awarded to a single graduating student each year.
 
2. Recipient of the National Talent Scholarship of the Government
   of India from 1995 to 2001.
 
3. I was awarded a Gold Medal (1 in 25 nationwide) in the Indian 
   National Standard Examination in Physics for High School 
   Students, 1997.

Publications: 
------------ 

1. Mahim Mishra, Timothy J. Callahan, Tiberiu Chelcea, Girish
   Venkataramani, Mihai Budiu and Seth C. Goldstein, "Tartan:
   Evaluating Spatial Computation for Whole Program Execution", in
   Proceedings of the Twelfth International Conference on
   Architectural Support for Programming Languages and Operating
   Systems (ASPLOS-XII), Oct 21-25, 2006, San Jose, CA. 163-174.

2. T Vogels, T Zanon, R Desineni, R D Blanton, W Maly, J G Brown, J E
   Nelson, Y Fei, X Huang, P Gopalakrishnan, M Mishra, V Rovner and S
   Tiwary, "Benchmarking diagnosis algorithms with a diverse set of IC
   deformations", in Proceedings of the International Test Conference,
   Oct 26-28, 2004, Charlotte, NC. 508-517.

3. Mahim Mishra and Seth C. Goldstein, "Defect Tolerance at the End of   
   the Roadmap", in "Nano, Quantum and Molecular Computing:
   Implications to High Level Design and Validation", Sandeep
   K. Shukla and R. Iris Bahar (Eds.), Kluwer Academic Publishers,
   Boston, 2004. 73-108.

4. Mahim Mishra and Seth C. Goldstein, Defect Tolerance at the End of
   the Roadmap, in Proceedings of the International Test Conference, 
   Sep 30-Oct 3, 2003, Charlotte, NC. 1201-1211.
 
5. Seth Goldstein, Mihai Budiu, Mahim Mishra, and Girish
   Venkataramani, Reconfigurable Computing and Electronic
   Nanotechnology, invited paper in IEEE 14th International Conference
   on Application-specific Systems, Architectures and Processors, June
   24-26, 2003, The Hague, Netherlands
 
6. Mahim Mishra and Seth C. Goldstein, Defect Tolerance at the End of
   the Roadmap, in Proceedings of the 10th International Test
   Synthesis Workshop, Mar 30-Apr 2, 2003, Santa Barbara, CA.

7. M. Budiu, M. Mishra, A. Bharambhe, S. C. Golstein, Peer-to-peer
   Hardware-software Interfaces for Reconfigurable Fabrics, in
   Proceedings of the IEEE Symposium on Field-Programmable Custom
   Computing Machines 2002 (FCCM '02), Napa Valley, CA, April 21 -
   April 24, 2002. 57-66.

8. M. Mishra, S. C. Goldstein, Scalable Defect Tolerance for Molecular
   Electronics, in Proceedings of the 1st Workshop on Non-Silicon
   Computing (NSC-1), 8th International Symposium on High-Performance
   Computer Architecture, Cambridge, MA, February 3, 2002.

9. A. Mukerjee, R. Bhattacharjee, M. Mishra, HIVE: An HPSG Interface
   for Video Animation, in Proceedings of the First International
   Conference on Multimedia Processing and Systems, Madras, India,
   August 13-15, 2000.

Teaching and Professional Experience:
------------------------------------
June-August 2002  Summer Intersnhip with the Quantum Science 
                  Research group at HP Labs, Palo Alto, CA. I worked 
                  on routing architectures and defect tolerance 
                  for very large reconfigurable fabrics, made using 
                  Chemically Assembled Electronic Nanotechnology.

January-May 2002  Teaching Assistant, Carnegie Mellon University, 
                  15-495: Parallel Computer Architecture and 
                  Programming.

May-June 2001     Instructor, Indian Institute of Technology, 
                  Kanpur, Summer Course on the Fundamentals of 
                  Computing for Non-Computer Scientists.

May-July 2000     Summer Internship at the Software Engineering Lab 
                  (LGL) of the Swiss Federal Institute of Technology,
                   Lausanne (EPFL). I implemented a syntax and type 
                  checker for "Operation Schemas", an object 
                  constraint specification language developed at LGL.

References:
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Available on request