The Synthesis of Combinational Logic from Sequentially Described Specifications

This paper describes a prototype system, HFS (High-Level Functional Synthesis), for synthesizing combinational logic from a C++ -like language. Unlike existing methods for generating combinational logic from high-level descriptions, restrictions that all loops must be static (i.e., the number of iterations is fixed at compile time) is lifted. By using HFS, portions of a design that do not reduce well using standard HLS techniques can be collapsed into a custom functional unit and scheduled as a single unit. The synthesis algorithm is based on Reduced Ordered Binary Decision Diagrams(ROBDDs), and given a fixed variable ordering produces canonical output for a given behavior suggesting possible formal verification applications as well.