| Abacus | Dynamic function placement for data-intensive cluster computing |
| Active Disks | Remote execution for network-attached storage |
| Active Storage Networks | Active network support for network-attached storage |
| Aura | Distraction-free ubiquitous computing |
| Ballista | Automated software robustness testing |
| CHIPS | Highly integrated information processing and storage systems |
| CM-MA | Secure, continuous biometric-enhanced authentication |
| Coda | Nomadic, failure-resilient data access |
| Darwin | Resource Management for Application-Aware Networks |
| DIXtrac | Automated disk drive characterization |
| DV | Interactive visualization of remote datasets |
| Enyac | Energy-aware computing |
| Freeblock scheduling | Extracting free bandwidth from busy disks |
| Impetus | Design, evaluation, and implementation of computer systems with emphasis on processor and memory architecture |
| Libra | Scalable Advanced Network Services based on Coordinated Active Components |
| MEMS-based storage systems | Designing systems with MEMS-based storage |
| Odyssey | OS extensions for adaptive mobile computing |
| PASIS | Survivable information storage systems |
| PipeRench | Reconfigurable computing using hardware virtualization for forward compatibility |
| Phoenix | Reconfigurable nanotechnology |
| PowerTap | Hardware and software mechanisms and policies for system-wide energy/power management |
| Profet | Never stalling waiting to access data |
| PUMA2 | Proactively uniform memory access architecture |
| Quake | Earthquake ground motion modelling |
| Remos | Network resource monitoring and prediction |
| RoSES | Graceful degradation for distributed embedded systems |
| Self-securing storage | Protecting data during client system intrusions |
| SPEC | Parallel and sequential computer system benchmarks |
| STAMPede | Using speculation to automatically parallelize everything |
| Survivable Systems | Specification and verification techniques and tools for analyzing fault-tolerant, secure systems |
| TRAC | High-level hardware description and synthesis |
Last updated by Satya on 05/17/2003