Newsgroups: sci.image.processing
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From: gns@world.std.com (Gerald N Shapiro)
Subject: Re: FFT Calculations: i860 or PowerPC 
Message-ID: <D1G9Mq.HxE@world.std.com>
Organization: The World Public Access UNIX, Brookline, MA
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Date: Tue, 27 Dec 1994 03:28:02 GMT
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>ron@topaz.sensor.com (Ron Natalie) wrote:
>>smenon@menudo.uh.edu (Shashi Menon) wrote:

>>At the moment, my dilemma is to whether I should go in for an i860 based
>>system with the idea of moving onto a PowerPC based system at a later
>>date or should I simply wait a while and get a PowerPC based system
>>when one becomes available. 

Standard arguement is that a better system will always be available if 
you wait, whenever you look at the technology. The question is whether 
you will get enough benefit from solving the computation problem today to 
justify the expenditure today.

>While we are at it, can you provide me a reference or two for Radix4 algos.
For general FFT reference, try Oppenheimer & Schafer's classic,"Digital 
Signal Processing". Beyond the basics of combining two adjacent radix 2 
passes into one radix 4 pass with some coefficient adjustments, most 
algorithms get too heavily involved in the peculiarities of the chip 
being programmed. Hence, I'd strongly recommend not wasting your time 
coding FFT's on anybody's chip, but take the best of what exists 
commercially.
....
>There's nothing inherently "vector" about the i860 other than the fact
>it has a cache and a bit of pipelining.  Intel did provide FFT code as
>an application note early on.

Yes, a lot of effort was expended at SKY, Mercury, CSPI, etc, to make a 
vector machine out of basically a scalar processor, with a three stage 
pipeline.  Hence, my comment that the quality of the software that comes 
with a particular board level product may be more important than the 
theoretical speed of the processor.

>: Most of my computations would involve either correlation calculations
>: using ffts or particle identification and tracking algorithms. While
>: the first can be efficiently done using i860s and parallel
>: programming, it is in the second - which is difficult to implement in
>: parallel -  that the higher clock speed of the PowerPCs would be an
>: advantage.

One question is why limit oneself to the PowerPC ? How about a DEC Alpha 
on the VME, for the highest processor clock speed? ( I have not checked 
today's paper though !).

But the real issue appears to be how to divide up a task for parallel 
processors, and not how to do FFTs. I have some concepts there, but  for 
specific advice on task partitioning, we should take this conversation 
off line.

Dr. Gerald Shapiro
gns@world.std.com


