Newsgroups: sci.image.processing
Path: cantaloupe.srv.cs.cmu.edu!das-news2.harvard.edu!news2.near.net!howland.reston.ans.net!pipex!uunet!world!gns
From: gns@world.std.com (Gerald N Shapiro)
Subject: Re: FFT Calculations: i860 or PowerPC 
Message-ID: <D1DrKG.CLt@world.std.com>
Organization: The World Public Access UNIX, Brookline, MA
X-Newsreader: TIN [version 1.2 PL2]
Date: Sun, 25 Dec 1994 19:02:40 GMT
Lines: 27

smenon@menudo.uh.edu (Shashi Menon) wrote on 24 DEC 1994:
> .....
>I realize that at the moment optimized algorithms exist for i860 to be 
>used as a vector engine for computing FFTs. However, what I was looking 
>for was some info about the inherent capability, or lack thereof,  of a 
>PPC for FFT type of applications.

	As one who had written many an optimized FFT code, I'd argue that 
"nurture" is as important as "nature". Now, the inherent capability for 
FFT , or its "nature" used to described by the time taken to do four 
floating point multiplies and six floating point adds.  However, the 
effort put into optimized algorithms, or "nurture" can add another 30% 
performance improvement, by using Radix 4 algorithms, making the first 
(or last pass) a special  case without multiplication, etc.. 
	Note that the i860 is inherently a lousy FFT machine with 
peculiar  multiplier/adder/register connections. Yet competitive 
pressures in the VME board marketplace forced a lot of optimized FFT 
code, including separate real and complex forms for 1-D and 2-D, forward 
and inverse.
	In my opinion, the real test of the usefulness of a board based 
on the latest RISC chip is the ability to compute  things other than the 
highly regular FFT. Hence the question, just what are you trying to 
compute beyond FFT's?

Jerry Shapiro
gns@world.std.com

