Date: Thu, 07 Nov 1996 19:16:45 GMT Server: NCSA/1.5 Content-type: text/html Last-modified: Mon, 15 Jul 1996 16:28:29 GMT Content-length: 2766
Professional:Affiliation:Computer Sciences Department, University of Wisconsin-MadisonContact:Address: Computer Sciences Department, 1210 W. Dayton Street, Madison, WI 53706Phone: 608-262-6587, Fax: 608-262-9777, Email: vijay@cs.wisc.edu Advisor:Guri SohiProject:The Multiscalar ProjectEducation:Doctorate: University of Wisconsin-Madison , August 1997Undergraduate: Birla Institute of Technology and Science, Pilani, India, 1990 Research:Compiling for the Multiscalar Architecture (Ph.D. Dissertation)The Anatomy of the Register File in a Multiscalar Processor, S. Breach, T. N. Vijaykumar, and G. S. Sohi, 27th Annual International Symposium on Microarchitecture (MICRO-27), 1994. Register Communication Strategies for the Multiscalar Architecture S. Breach, T. N. Vijaykumar, and G. S. Sohi, Submitted to 29th Annual International Symposium on Microarchitecture (MICRO-29), 1996. Multiscalar Processors, G. S. Sohi, S. Breach, and T. N. Vijaykumar, 22th International Symposium on Computer Architecture, 1995. Compiling Register Communication for the Multiscalar Architecture T. N. Vijaykumar, and G. S. Sohi, On going work. Personal: My other side !
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