Date: Thu, 21 Nov 1996 20:32:24 GMT Server: NCSA/1.4.2 Content-type: text/html Last-modified: Mon, 18 Mar 1996 22:50:51 GMT Content-length: 5144 Memory Systems Research at the University of Washington

Memory Systems Research

Department of Computer Science & Engineering
University of Washington, FR-35
Seattle, WA 98195

Welcome to the home page for Memory Systems Research at UW CSE.

Description

Our research group is investigating techniques that use the operating system to improve memory system performance. All of our work shares the following features:

In our most recent project, we explored policies that monitor application memory reference patterns in order to identify and resolve TLB performance problems. Poor TLB performance results when the TLB is too small to cover the current application's working set. Several modern architectures support superpages: pages whose size is a multiple of the system's base page size. On such systems TLB performance can be improved by using larger pages, but at the cost of wasted memory due to internal fragmentation.

We simulated several policies that adapt the page size dynamically to different regions of an application's address space, constructing superpages by copying the component pages to a contiguous region of memory. We developed a policy that monitors TLB misses, and balances the potential benefit of having a superpage (a reduction in future TLB misses) against the cost of constructing the superpage (an in-memory copy). By constructing superpages only when and where TLB miss patterns warrant, this policy attains the TLB performance of large pages without their internal fragmentation.

For more details on this project, see our paper Reducing TLB and Memory Overhead Using Online Superpage Promotion (ISCA '95, to appear).

We're looking for someone to implement these algorithms -- this would make a good quals or masters project.
Project Description.


People

Faculty: Current Students:

Papers


Memory Systems Bibliography


Ted Romer (romer@cs.washington.edu)