Systems Seminar: John Crawford, Intel Fellow and Director of Microprocessor Architecture, Intel Corporation

EPIC: Explicitly Parallel Instruction Computing

photograph of John Crawford.

Date: 1998 Apr 9
Time: 2:00 - 3:30
Location: Singleton Room, Roberts Hall


This talk outlines the key architectural advances included in the 64-bit instruction set jointly defined by Intel and HP in a joint research activity that started in June of 1994. The set of techniques is named EPIC, for Explicitly Parallel Instruction Computing. EPIC includes three main principles:

This talk briefly covers the history and motivation for EPIC, the key elements of EPIC, some code examples illustrating the benefit of the EPIC techniques, and a sketch of how the EPIC technology processors fit into Intel's microprocessor roadmap.

Speaker Bio

John Crawford is the Director of Microprocessor Architecture at Intel Corporation, Santa Clara, California. Mr. Crawford manages the development of future microprocessor architectures, and development of the simulation tools necessary to validate functional completeness and performance.

Mr. Crawford joined Intel in 1977 and worked until 1982 in compiler development. He has been involved with the Intel386 family architecture from its inception in 1982. Mr. Crawford was the Chief Architect of both the Intel386 and Intel486 microprocessors, and co-managed the development of the Pentium microprocessor. He was named an Intel Fellow, Intel's highest technical position, in 1992. He received the the ACM/IEEE Eckert-Mauchly Award and the IEEE Ernst Weber Engineering Leadership Recognition award in 1995 and 1997, respectively, for his leadership and important contributions to the continuing development of microprocessors. He has been awarded 8 patents, published several papers on compiler technology and microprocessor architecture, and co-authored a book entitled "Programming the 80386".

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