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Nonphotolithographic nanoscale memory density prospects

DeHon, A.   Goldstein, S.C.   Kuekes, P.J.   Lincoln, P.  
Comput. Sci. Dept., California Inst. of Technol., Pasadena, CA, USA;

This paper appears in: Nanotechnology, IEEE Transactions on
Publication Date: March 2005
Volume: 4,  Issue: 2
On page(s): 215- 228
ISSN: 1536-125X
INSPEC Accession Number: 8328842
Digital Object Identifier: 10.1109/TNANO.2004.837849
Posted online: 2005-03-14 08:31:03.0

Technologies are now emerging to construct molecular-scale electronic wires and switches using bottom-up self-assembly. This opens the possibility of constructing nanoscale circuits and memories where active devices are just a few nanometers square and wire pitches may be on the order of ten nanometers. The features can be defined at this scale without using photolithography. The available assembly techniques have relatively high defect rates compared to conventional lithographic integrated circuits and can only produce very regular structures. Nonetheless, with proper memory organization, it is reasonable to expect these technologies to provide memory densities in excess of 10/sup 11/ b/cm/sup 2/ with modest active power requirements under 0.6 W/Tb/s for random read operations.

Index Terms

Controlled Indexing
molecular electronics   nanoelectronics   nanolithography   nanowires   self-assembly   storage management   switches  

Non-controlled Indexing
high defect rate   memory densities   memory organization   molecular scale electronic wires   nanoscale circuits   nonphotolithographic nanoscale memory density prospects   photolithography   power requirement   self-assembly   switches   wire pitches  

Author Keywords
Defect tolerance   electronic nanotechnology    memory density   memory organization   molecular electronics  
1 International Technology Roadmap for Semiconductors, 2001 [online] Available: http://public.itrs.net/Files/2001ITRS/ .
2 Y. Chen, D. A. A. Ohlberg, X. Li, D. R. Stewart, R. S. Williams, J. O. Jeppesen, K. A. Nielsen, J. F. Stoddart, D. L. Olynick, and E. Anderson, “Nanoscale molecular-switch devices fabricated by imprint lithography,” Appl. Phys. Lett., vol. 82, no. 10, pp. 1610-1612, 2003.
[CrossRef] [Buy Via Ask*IEEE]
3 D. R. Stewart, D. A. A. Ohlberg, P. A. Beck, Y. Chen, R. S. Williams, J. O. Jeppesen, K. A. Nielsen, and J. F. Stoddart, “Molecule-independent electrical switching in Pt/organic monolayer/Ti devices,” Nanoletters, vol. 4, no. 1, pp. 133-136, 2004.
[Buy Via Ask*IEEE]
4 C. Dekker, “Carbon nanotubes as molecular quantum wires,” Phys. Today, pp. 22-28, May 1999.
[Buy Via Ask*IEEE]
5 R. Krupke, F. Hennrich, H. von L\öhneysen, and M. M. Kappes, “Separation of metallic from semiconducting single-walled carbon nanotubes,” Science, vol. 301, pp. 344-347, Jul. 2003.
[CrossRef] [Buy Via Ask*IEEE]
6 Y. Cui, L. J. Lauhon, M. S. Gudiksen, J. Wang, and C. M. Lieber, “Diameter-controlled synthesis of single crystal silicon nanowires,” Appl. Phys. Lett., vol. 78, no. 15, pp. 2214-2216, 2001.
[CrossRef] [Buy Via Ask*IEEE]
7 A. M. Morales and C. M. Lieber, “A laser ablation method for synthesis of crystalline semiconductor nanowires,” Science, vol. 279, pp. 208-211, 1998.
[CrossRef] [Buy Via Ask*IEEE]
8 Y. Wu and P. Yang, “Germanium nanowire growth via simple vapor transport,” Chem. Materials, vol. 12, pp. 605-607, 2000.
[Buy Via Ask*IEEE]
9 Y. Cui, X. Duan, J. Hu, and C. M. Lieber, “Doping and electrical transport in silicon nanowires,” J. Phys. Chem. B, vol. 104, no. 22, pp. 5213-5216, Jun. 2000.
[Buy Via Ask*IEEE]
10 Y. Huang, X. Duan, Y. Cui, L. Lauhon, K. Kim, and C. M. Lieber, “Logic gates and computation from assembled nanowire building blocks,” Science, vol. 294, pp. 1313-1317, 2001.
[CrossRef] [Buy Via Ask*IEEE]
11 Y. Cui, Z. Zhong, D. Wang, W. U. Wang, and C. M. Lieber, “High performance silicon nanowire field effect transistors,” Nanoletters, vol. 3, no. 2, pp. 149-152, 2003.
[Buy Via Ask*IEEE]
12 A. DeHon, “Array-based architecture for fet-based, nanoscale electronics,” IEEE Trans. Nanotechnol., vol. 2, no. 2, pp. 23-32, Mar. 2003.
Abstract | Full Text: PDF (1723KB)
13 Y. Huang, X. Duan, Q. Wei, and C. M. Lieber, “Directed assembley of one-dimensional nanostructures into functional networks,” Science, vol. 291, pp. 630-633, Jan. 2001.
[CrossRef] [Buy Via Ask*IEEE]
14 D. Whang, S. Jin, and C. M. Lieber, “Nanolithography using hierarchically assembled nanowire masks,” Nanoletters, vol. 3, no. 7, pp. 951-954, July 2003.
[Buy Via Ask*IEEE]
15 Y. Chen, D. A. A. Ohlberg, G. Medeiros-Ribeiro, Y. A. Chang, and R. S. Williams, “Self-assembled growth of epitaxial erbium disilicide nanowires on silicon $(001)$,” Appl. Phys. Lett., vol. 76, no. 26, pp. 4004-4006, 2000.
[Buy Via Ask*IEEE]
16 S. Y. Chou, P. R. Krauss, and P. J. Renstrom, “Imprint lithography with 25-nanometer resolution,” Science, vol. 272, pp. 85-87, 1996.
[Buy Via Ask*IEEE]
17 Y. Xia and G. M. Whitesides, “Soft lithography,” Annu. Rev. Mat. Sci., vol. 28, pp. 153-84, 1998.
[CrossRef] [Buy Via Ask*IEEE]
18 S. Y. Chou, P. R. Krauss, W. Zhang, L. Guo, and L. Zhuang, “Sub-10 nm imprint lithography and applications,” J. Vac. Sci. Technol. B, Microelectron. Process. Phenom., vol. 15, no. 6, pp. 2897-2904, Nov.\–Dec. 1997.
[CrossRef] [Buy Via Ask*IEEE]
19 Y. Chen, G.-Y. Jung, D. A. A. Ohlberg, X. Li, D. R. Stewart, J. O. Jeppesen, K. A. Nielsen, J. F. Stoddart, and R. S. Williams, “Nanoscale molecular-switch crossbar circuits,” Nanotechnology, vol. 14, pp. 462-468, 2003.
[CrossRef] [Buy Via Ask*IEEE]
20 N. A. Melosh, A. Boukai, F. Diana, B. Gerardot, A. Badolato, P. M. Petroff, and J. R. Heath, “Ultrahigh-density nanowire lattices and circuits,” Science, vol. 300, pp. 112-115, Apr. 2003.
[CrossRef] [Buy Via Ask*IEEE]
21 C. Collier, G. Mattersteig, E. Wong, Y. Luo, K. Beverly, J. Sampaio, F. Raymo, J. Stoddart, and J. Heath, “A $[ 2 ]$ catenane-based solid state reconfigurable switch,” Science, vol. 289, pp. 1172-1175, 2000.
[Buy Via Ask*IEEE]
22 C. L. Brown, U. Jonas, J. A. Preece, H. Ringsdorf, M. Seitz, and J. F. Stoddart, “Introduction of $[ 2 ]$ catenanes into langmuir films and langmuir-blodgett multilayers. A possible strategy for molecular information storage materials,” Langmuir, vol. 16, no. 4, pp. 1924-1930, 2000.
[Buy Via Ask*IEEE]
23 S. Williams and P. Kuekes, Demultiplexer for a molecular wire crossbar network, U.S. Patent 6\ 256\ 767, Jul. 3, 2001.
[Buy Via Ask*IEEE]
24 A. DeHon, P. Lincoln, and J. Savage, “Stochastic assembly of sublithographic nanoscale interfaces,” IEEE Trans. Nanotechnol., vol. 2, no. 3, pp. 165-174, Sep. 2003.
Abstract | Full Text: PDF (1164KB)
25 M. S. Gudiksen, L. J. Lauhon, J. Wang, D. C. Smith, and C. M. Lieber, “Growth of nanowire superlattice structures for nanoscale photonics and electronics,” Nature, vol. 415, pp. 617-620, February 2002.
[CrossRef] [Buy Via Ask*IEEE]
26 Y. Wu, R. Fan, and P. Yang, “Block-by-block growth of single-crystalline Si/SiGe superlattice nanowires,” Nano Lett., vol. 2, no. 2, pp. 83-86, Feb. 2002.
[Buy Via Ask*IEEE]
27 M. T. Bj\örk, B. J. Ohlsson, T. Sass, A. I. Persson, C. Thelander, M. H. Magnusson, K. Depper, L. R. Wallenberg, and L. Samuelson, “One-dimensional steeplechase for electrons realized,” Nano Lett., vol. 2, no. 2, pp. 87-89, Feb. 2002.
[Buy Via Ask*IEEE]
28 M. S. Gudiksen, J. Wang, and C. M. Lieber, “Synthetic control of the diameter and length of semiconductor nanowires,” J. Phys. Chem. B, vol. 105, pp. 4062-4064, 2001.
[Buy Via Ask*IEEE]
29 G. C. Clark, Jr. and J. B. Cain, Error-Correction Coding for Digital Communications New York: Plenum, 1981.
[Buy Via Ask*IEEE]
30 J. M. Tour, L. Cheng, D. P. Nackashi, Y. Yao, A. K. Flatt, S. K. S. Angelo, T. E. Mallouk, and P. D. Franzon, “Nanocell electronic memories,” J. Amer. Chem. Soc., vol. 125, no. 43, pp. 13279-13\ 283, 2003.
[Buy Via Ask*IEEE]
31 T. Rueckes, K. Kim, E. Joselevich, G. Y. Tseng, C.-L. Cheung, and C. M. Lieber, “Carbon nanotube based nonvolatile random access memory for molecular computing,” Science, vol. 289, pp. 94-97, 2000.
[CrossRef] [Buy Via Ask*IEEE]
32 C. M. Lieber and X. Duan, NanoFET threshold voltages, Dec. 2001.
33 P. L. McEuen, M. Fuhrer, and H. Park, “Single-walled carbon nanotubes electronics,” IEEE Trans. Nanotechnol., vol. 1, no. 2, pp. 75-85, Mar. 2002.
Abstract | Full Text: PDF (423KB)
34 J. Bierbrauer and Y. Edel, “New code parameters from Reed\–Solomon subfield codes,” IEEE Trans. Inform. Theory, vol. 43, no. 3, pp. 953-968, May 1997.
Abstract | Full Text: PDF (952KB)
Citing Documents
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Nanotechnology, IEEE Transactions on
On page(s): 681- 687, Volume: 4, Issue: 6, Nov. 2005
Abstract |  Full Text: PDF (384)
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