
PC_Comm.elf:     file format elf32-avr

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .data         000000d0  00800100  000016e0  00001754  2**0
                  CONTENTS, ALLOC, LOAD, DATA
  1 .text         000016e0  00000000  00000000  00000074  2**1
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .bss          00000045  008001d0  000017b0  00001824  2**0
                  ALLOC
  3 .debug_aranges 00000100  00000000  00000000  00001824  2**0
                  CONTENTS, READONLY, DEBUGGING
  4 .debug_pubnames 00000529  00000000  00000000  00001924  2**0
                  CONTENTS, READONLY, DEBUGGING
  5 .debug_info   00001803  00000000  00000000  00001e4d  2**0
                  CONTENTS, READONLY, DEBUGGING
  6 .debug_abbrev 00000aca  00000000  00000000  00003650  2**0
                  CONTENTS, READONLY, DEBUGGING
  7 .debug_line   00001486  00000000  00000000  0000411a  2**0
                  CONTENTS, READONLY, DEBUGGING
  8 .debug_frame  00000340  00000000  00000000  000055a0  2**2
                  CONTENTS, READONLY, DEBUGGING
  9 .debug_str    0000067a  00000000  00000000  000058e0  2**0
                  CONTENTS, READONLY, DEBUGGING
 10 .debug_loc    00000883  00000000  00000000  00005f5a  2**0
                  CONTENTS, READONLY, DEBUGGING
 11 .debug_ranges 000000c0  00000000  00000000  000067dd  2**0
                  CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:

00000000 <__vectors>:
       0:	0c 94 64 00 	jmp	0xc8	; 0xc8 <__ctors_end>
       4:	0c 94 81 00 	jmp	0x102	; 0x102 <__bad_interrupt>
       8:	0c 94 81 00 	jmp	0x102	; 0x102 <__bad_interrupt>
       c:	0c 94 23 07 	jmp	0xe46	; 0xe46 <__vector_3>
      10:	0c 94 81 00 	jmp	0x102	; 0x102 <__bad_interrupt>
      14:	0c 94 81 00 	jmp	0x102	; 0x102 <__bad_interrupt>
      18:	0c 94 81 00 	jmp	0x102	; 0x102 <__bad_interrupt>
      1c:	0c 94 f6 06 	jmp	0xdec	; 0xdec <__vector_7>
      20:	0c 94 81 00 	jmp	0x102	; 0x102 <__bad_interrupt>
      24:	0c 94 81 00 	jmp	0x102	; 0x102 <__bad_interrupt>
      28:	0c 94 81 00 	jmp	0x102	; 0x102 <__bad_interrupt>
      2c:	0c 94 81 00 	jmp	0x102	; 0x102 <__bad_interrupt>
      30:	0c 94 81 00 	jmp	0x102	; 0x102 <__bad_interrupt>
      34:	0c 94 81 00 	jmp	0x102	; 0x102 <__bad_interrupt>
      38:	0c 94 81 00 	jmp	0x102	; 0x102 <__bad_interrupt>
      3c:	0c 94 81 00 	jmp	0x102	; 0x102 <__bad_interrupt>
      40:	0c 94 81 00 	jmp	0x102	; 0x102 <__bad_interrupt>
      44:	0c 94 81 00 	jmp	0x102	; 0x102 <__bad_interrupt>
      48:	0c 94 81 00 	jmp	0x102	; 0x102 <__bad_interrupt>
      4c:	0c 94 81 00 	jmp	0x102	; 0x102 <__bad_interrupt>
      50:	0c 94 81 00 	jmp	0x102	; 0x102 <__bad_interrupt>
      54:	0c 94 81 00 	jmp	0x102	; 0x102 <__bad_interrupt>
      58:	0c 94 21 04 	jmp	0x842	; 0x842 <__vector_22>

0000005c <LCD_character_table>:
      5c:	a8 ea 80 2a 00 40 00 0a 51 0a 08 40 59 55 18 01     ...*.@..Q..@YU..
      6c:	11 1e 11 1b 50 0b 41 1b 41 1f 11 01 51 1f 51 1b     ....P.A.A...Q.Q.
      7c:	00 00 00 00 08 80 00 1a 20 40 00 00 00 00 51 0f     ........ @....Q.
      8c:	91 39 41 14 91 31 41 1e 41 0e 41 1d 50 0f 80 20     .9A..1A.A.A.P.. 
      9c:	10 15 48 86 40 14 78 05 70 85 51 15 51 0e 51 95     ..H.@.x.p.Q.Q.Q.
      ac:	51 8e 21 90 81 20 50 15 48 44 50 c5 28 c0 28 20     Q.!.. P.HDP.(.( 
      bc:	09 50 41 14 20 80 11 11 00 00 00 10                 .PA. .......

000000c8 <__ctors_end>:
      c8:	11 24       	eor	r1, r1
      ca:	1f be       	out	0x3f, r1	; 63
      cc:	cf ef       	ldi	r28, 0xFF	; 255
      ce:	d4 e0       	ldi	r29, 0x04	; 4
      d0:	de bf       	out	0x3e, r29	; 62
      d2:	cd bf       	out	0x3d, r28	; 61

000000d4 <__do_copy_data>:
      d4:	11 e0       	ldi	r17, 0x01	; 1
      d6:	a0 e0       	ldi	r26, 0x00	; 0
      d8:	b1 e0       	ldi	r27, 0x01	; 1
      da:	e0 ee       	ldi	r30, 0xE0	; 224
      dc:	f6 e1       	ldi	r31, 0x16	; 22
      de:	02 c0       	rjmp	.+4      	; 0xe4 <.do_copy_data_start>

000000e0 <.do_copy_data_loop>:
      e0:	05 90       	lpm	r0, Z+
      e2:	0d 92       	st	X+, r0

000000e4 <.do_copy_data_start>:
      e4:	a0 3d       	cpi	r26, 0xD0	; 208
      e6:	b1 07       	cpc	r27, r17
      e8:	d9 f7       	brne	.-10     	; 0xe0 <.do_copy_data_loop>

000000ea <__do_clear_bss>:
      ea:	12 e0       	ldi	r17, 0x02	; 2
      ec:	a0 ed       	ldi	r26, 0xD0	; 208
      ee:	b1 e0       	ldi	r27, 0x01	; 1
      f0:	01 c0       	rjmp	.+2      	; 0xf4 <.do_clear_bss_start>

000000f2 <.do_clear_bss_loop>:
      f2:	1d 92       	st	X+, r1

000000f4 <.do_clear_bss_start>:
      f4:	a5 31       	cpi	r26, 0x15	; 21
      f6:	b1 07       	cpc	r27, r17
      f8:	e1 f7       	brne	.-8      	; 0xf2 <.do_clear_bss_loop>
      fa:	0e 94 1c 02 	call	0x438	; 0x438 <main>
      fe:	0c 94 6e 0b 	jmp	0x16dc	; 0x16dc <_exit>

00000102 <__bad_interrupt>:
     102:	0c 94 00 00 	jmp	0	; 0x0 <__vectors>

00000106 <parseInput>:
	//sendString(" \rYou are talking to the PC_Comm demo.\r" );

}

int parseInput(char s[])
{
     106:	ef 92       	push	r14
     108:	ff 92       	push	r15
     10a:	0f 93       	push	r16
     10c:	1f 93       	push	r17
     10e:	df 93       	push	r29
     110:	cf 93       	push	r28
     112:	cd b7       	in	r28, 0x3d	; 61
     114:	de b7       	in	r29, 0x3e	; 62
     116:	c9 55       	subi	r28, 0x59	; 89
     118:	d0 40       	sbci	r29, 0x00	; 0
     11a:	0f b6       	in	r0, 0x3f	; 63
     11c:	f8 94       	cli
     11e:	de bf       	out	0x3e, r29	; 62
     120:	0f be       	out	0x3f, r0	; 63
     122:	cd bf       	out	0x3d, r28	; 61
     124:	8c 01       	movw	r16, r24
	// Check which command ios being sent
	if( strncmp(s, "START", 5) == 0 ) {
     126:	45 e0       	ldi	r20, 0x05	; 5
     128:	50 e0       	ldi	r21, 0x00	; 0
     12a:	60 e0       	ldi	r22, 0x00	; 0
     12c:	71 e0       	ldi	r23, 0x01	; 1
     12e:	0e 94 7f 08 	call	0x10fe	; 0x10fe <strncmp>
     132:	00 97       	sbiw	r24, 0x00	; 0
     134:	11 f5       	brne	.+68     	; 0x17a <parseInput+0x74>
		// The START## command is used to set the number of sonar to
		// range and to start ranging
		//sendString( "Read start command\n" );

		// If the data array was initialized previously, delete it
		if( dataArray != NULL ) {
     136:	80 91 d3 01 	lds	r24, 0x01D3
     13a:	90 91 d4 01 	lds	r25, 0x01D4
     13e:	00 97       	sbiw	r24, 0x00	; 0
     140:	11 f0       	breq	.+4      	; 0x146 <parseInput+0x40>
			free( dataArray );
     142:	0e 94 09 08 	call	0x1012	; 0x1012 <free>
		}

		// The number after START is the number of sonar to use
		numSonar = atoi( &s[5] );
     146:	c8 01       	movw	r24, r16
     148:	05 96       	adiw	r24, 0x05	; 5
     14a:	0e 94 61 08 	call	0x10c2	; 0x10c2 <atoi>
     14e:	80 93 d0 01 	sts	0x01D0, r24
		dataArray = (uint16_t *)malloc( numSonar * sizeof(uint16_t) );
     152:	90 e0       	ldi	r25, 0x00	; 0
     154:	88 0f       	add	r24, r24
     156:	99 1f       	adc	r25, r25
     158:	0e 94 5f 07 	call	0xebe	; 0xebe <malloc>
     15c:	80 93 d3 01 	sts	0x01D3, r24
     160:	90 93 d4 01 	sts	0x01D4, r25

		SRF_init( numSonar );
     164:	80 91 d0 01 	lds	r24, 0x01D0
     168:	90 e0       	ldi	r25, 0x00	; 0
     16a:	0e 94 79 05 	call	0xaf2	; 0xaf2 <SRF_init>

		// Update the LCD right away
		lcdDisplay = SRF_TRUE;
     16e:	81 e0       	ldi	r24, 0x01	; 1
     170:	80 93 a8 01 	sts	0x01A8, r24
     174:	21 e0       	ldi	r18, 0x01	; 1
     176:	30 e0       	ldi	r19, 0x00	; 0
     178:	6d c0       	rjmp	.+218    	; 0x254 <parseInput+0x14e>

		// The next state is to send data
		return STATE_SEND_DATA;
	}
	else if( strncmp(s, "STOP", 4) == 0 ){
     17a:	44 e0       	ldi	r20, 0x04	; 4
     17c:	50 e0       	ldi	r21, 0x00	; 0
     17e:	66 e0       	ldi	r22, 0x06	; 6
     180:	71 e0       	ldi	r23, 0x01	; 1
     182:	c8 01       	movw	r24, r16
     184:	0e 94 7f 08 	call	0x10fe	; 0x10fe <strncmp>
     188:	00 97       	sbiw	r24, 0x00	; 0
     18a:	19 f4       	brne	.+6      	; 0x192 <parseInput+0x8c>
     18c:	20 e0       	ldi	r18, 0x00	; 0
     18e:	30 e0       	ldi	r19, 0x00	; 0
     190:	61 c0       	rjmp	.+194    	; 0x254 <parseInput+0x14e>
		// The STOP command is used to stop ranging
		//sendString( "Read STOP command\n" );
		return STATE_WAIT_FOR_START;
	}
	else if( strncmp(s, "ADDR", 4) == 0 ) {
     192:	44 e0       	ldi	r20, 0x04	; 4
     194:	50 e0       	ldi	r21, 0x00	; 0
     196:	6b e0       	ldi	r22, 0x0B	; 11
     198:	71 e0       	ldi	r23, 0x01	; 1
     19a:	c8 01       	movw	r24, r16
     19c:	0e 94 7f 08 	call	0x10fe	; 0x10fe <strncmp>
     1a0:	00 97       	sbiw	r24, 0x00	; 0
     1a2:	61 f5       	brne	.+88     	; 0x1fc <parseInput+0xf6>
		// The ADDR#1,#2 command is used to change the address of
		// the single sonar connected. 
		// #1 is the old index, must take two characters
		// #2 is the new index, must take two characters
		sendString( "Read Change Address command\n" );
     1a4:	80 e1       	ldi	r24, 0x10	; 16
     1a6:	91 e0       	ldi	r25, 0x01	; 1
     1a8:	0e 94 6c 01 	call	0x2d8	; 0x2d8 <sendString>
		//sendString( s );
		uint8_t oldIndex = atoi( &s[4] );
     1ac:	c8 01       	movw	r24, r16
     1ae:	04 96       	adiw	r24, 0x04	; 4
     1b0:	0e 94 61 08 	call	0x10c2	; 0x10c2 <atoi>
     1b4:	e8 2e       	mov	r14, r24
		uint8_t newIndex = atoi( &s[7] );
     1b6:	c8 01       	movw	r24, r16
     1b8:	07 96       	adiw	r24, 0x07	; 7
     1ba:	0e 94 61 08 	call	0x10c2	; 0x10c2 <atoi>
     1be:	f8 2e       	mov	r15, r24
		char line[25];
		sprintf( line, "Old: %d New: %d\n", oldIndex, newIndex );
     1c0:	90 e0       	ldi	r25, 0x00	; 0
     1c2:	9f 93       	push	r25
     1c4:	8f 93       	push	r24
     1c6:	8e 2d       	mov	r24, r14
     1c8:	90 e0       	ldi	r25, 0x00	; 0
     1ca:	9f 93       	push	r25
     1cc:	8f 93       	push	r24
     1ce:	8d e2       	ldi	r24, 0x2D	; 45
     1d0:	91 e0       	ldi	r25, 0x01	; 1
     1d2:	9f 93       	push	r25
     1d4:	8f 93       	push	r24
     1d6:	8e 01       	movw	r16, r28
     1d8:	0f 5f       	subi	r16, 0xFF	; 255
     1da:	1f 4f       	sbci	r17, 0xFF	; 255
     1dc:	1f 93       	push	r17
     1de:	0f 93       	push	r16
     1e0:	0e 94 95 08 	call	0x112a	; 0x112a <sprintf>
		sendString( line );
     1e4:	c8 01       	movw	r24, r16
     1e6:	0e 94 6c 01 	call	0x2d8	; 0x2d8 <sendString>

		SRF_changeAddress( oldIndex, newIndex );
     1ea:	6f 2d       	mov	r22, r15
     1ec:	8e 2d       	mov	r24, r14
     1ee:	0e 94 7c 05 	call	0xaf8	; 0xaf8 <SRF_changeAddress>
		return state; // No state change
     1f2:	80 91 d1 01 	lds	r24, 0x01D1
     1f6:	28 2f       	mov	r18, r24
     1f8:	30 e0       	ldi	r19, 0x00	; 0
     1fa:	24 c0       	rjmp	.+72     	; 0x244 <parseInput+0x13e>
	}
	else {
		// Invalid command
		char invalidMsg[64] = "Invalid Message: ";
     1fc:	de 01       	movw	r26, r28
     1fe:	5a 96       	adiw	r26, 0x1a	; 26
     200:	e5 e4       	ldi	r30, 0x45	; 69
     202:	f1 e0       	ldi	r31, 0x01	; 1
     204:	82 e1       	ldi	r24, 0x12	; 18
     206:	01 90       	ld	r0, Z+
     208:	0d 92       	st	X+, r0
     20a:	81 50       	subi	r24, 0x01	; 1
     20c:	e1 f7       	brne	.-8      	; 0x206 <parseInput+0x100>
     20e:	fe 01       	movw	r30, r28
     210:	bc 96       	adiw	r30, 0x2c	; 44
     212:	8e e2       	ldi	r24, 0x2E	; 46
     214:	df 01       	movw	r26, r30
     216:	1d 92       	st	X+, r1
     218:	8a 95       	dec	r24
     21a:	e9 f7       	brne	.-6      	; 0x216 <parseInput+0x110>
		sprintf( invalidMsg, "E%s%s\n", invalidMsg, s );
     21c:	1f 93       	push	r17
     21e:	0f 93       	push	r16
     220:	8e 01       	movw	r16, r28
     222:	06 5e       	subi	r16, 0xE6	; 230
     224:	1f 4f       	sbci	r17, 0xFF	; 255
     226:	1f 93       	push	r17
     228:	0f 93       	push	r16
     22a:	8e e3       	ldi	r24, 0x3E	; 62
     22c:	91 e0       	ldi	r25, 0x01	; 1
     22e:	9f 93       	push	r25
     230:	8f 93       	push	r24
     232:	1f 93       	push	r17
     234:	0f 93       	push	r16
     236:	0e 94 95 08 	call	0x112a	; 0x112a <sprintf>
		sendString( invalidMsg );
     23a:	c8 01       	movw	r24, r16
     23c:	0e 94 6c 01 	call	0x2d8	; 0x2d8 <sendString>
     240:	20 e0       	ldi	r18, 0x00	; 0
     242:	30 e0       	ldi	r19, 0x00	; 0
     244:	8d b7       	in	r24, 0x3d	; 61
     246:	9e b7       	in	r25, 0x3e	; 62
     248:	08 96       	adiw	r24, 0x08	; 8
     24a:	0f b6       	in	r0, 0x3f	; 63
     24c:	f8 94       	cli
     24e:	9e bf       	out	0x3e, r25	; 62
     250:	0f be       	out	0x3f, r0	; 63
     252:	8d bf       	out	0x3d, r24	; 61
		return STATE_WAIT_FOR_START;
	}

}
     254:	c9 01       	movw	r24, r18
     256:	c7 5a       	subi	r28, 0xA7	; 167
     258:	df 4f       	sbci	r29, 0xFF	; 255
     25a:	0f b6       	in	r0, 0x3f	; 63
     25c:	f8 94       	cli
     25e:	de bf       	out	0x3e, r29	; 62
     260:	0f be       	out	0x3f, r0	; 63
     262:	cd bf       	out	0x3d, r28	; 61
     264:	cf 91       	pop	r28
     266:	df 91       	pop	r29
     268:	1f 91       	pop	r17
     26a:	0f 91       	pop	r16
     26c:	ff 90       	pop	r15
     26e:	ef 90       	pop	r14
     270:	08 95       	ret

00000272 <initializer>:
extern uint16_t * dataArray;
extern uint8_t numSonar;
extern uint8_t lcdDisplay;

void initializer()
{
     272:	0e 94 b8 01 	call	0x370	; 0x370 <OSCCAL_calibration>
	// Calibrate the oscillator:
    OSCCAL_calibration();   
	
	// Initialize the USART
	USARTinit();
     276:	0e 94 9d 01 	call	0x33a	; 0x33a <USARTinit>

	// Initialize the LCD
	LCD_Init();
     27a:	0e 94 c2 03 	call	0x784	; 0x784 <LCD_Init>

	// Initialize I2C on the USI port
	USI_TWI_Master_Initialise();
     27e:	0e 94 de 02 	call	0x5bc	; 0x5bc <USI_TWI_Master_Initialise>

	// the heart beat thread runs every 100ms
	heartBeatThreadInit();
     282:	0e 94 b2 06 	call	0xd64	; 0xd64 <heartBeatThreadInit>

	// Use the center button of the joystick
	joystickInit();
     286:	0e 94 1a 07 	call	0xe34	; 0xe34 <joystickInit>
	// say hello
	//sendString( "\rPC_Comm.c ready to communicate.\r" );
	// identify yourself specifically
	//sendString(" \rYou are talking to the PC_Comm demo.\r" );

}
     28a:	08 95       	ret

0000028c <isCharAvailable>:




char isCharAvailable()
{	
     28c:	80 91 c0 00 	lds	r24, 0x00C0
	// Does the RX0 bit of the USART Status and Control Register
	// indicate a char has been received?
	if ( (UCSRA & (0x80)) ) return 1;
	else return 0;
}
     290:	88 1f       	adc	r24, r24
     292:	88 27       	eor	r24, r24
     294:	88 1f       	adc	r24, r24
     296:	08 95       	ret

00000298 <receiveChar>:

char receiveChar()
{
     298:	80 91 c6 00 	lds	r24, 0x00C6
	// Return the char in the UDR0 register
	return UDR;
}
     29c:	08 95       	ret

0000029e <sendChar>:

void sendChar(char data)
{
     29e:	80 93 c6 00 	sts	0x00C6, r24

    // To send data with the USART put the data in the USART data register 
    UDR = data;

    // Check to see if the global interrupts are enabled
    if(SREG & 0x80)
     2a2:	0f b6       	in	r0, 0x3f	; 63
     2a4:	07 fe       	sbrs	r0, 7
     2a6:	0e c0       	rjmp	.+28     	; 0x2c4 <sendChar+0x26>
     2a8:	20 e0       	ldi	r18, 0x00	; 0
     2aa:	30 e0       	ldi	r19, 0x00	; 0
     2ac:	02 c0       	rjmp	.+4      	; 0x2b2 <sendChar+0x14>
    {
	// Wait until the byte is sent or we count out
		while ( !(UCSRA&0x40) && (i<10000) )
		{
			i++;
     2ae:	2f 5f       	subi	r18, 0xFF	; 255
     2b0:	3f 4f       	sbci	r19, 0xFF	; 255

    // Check to see if the global interrupts are enabled
    if(SREG & 0x80)
    {
	// Wait until the byte is sent or we count out
		while ( !(UCSRA&0x40) && (i<10000) )
     2b2:	80 91 c0 00 	lds	r24, 0x00C0
     2b6:	86 fd       	sbrc	r24, 6
     2b8:	09 c0       	rjmp	.+18     	; 0x2cc <sendChar+0x2e>
     2ba:	87 e2       	ldi	r24, 0x27	; 39
     2bc:	20 31       	cpi	r18, 0x10	; 16
     2be:	38 07       	cpc	r19, r24
     2c0:	b1 f7       	brne	.-20     	; 0x2ae <sendChar+0x10>
     2c2:	04 c0       	rjmp	.+8      	; 0x2cc <sendChar+0x2e>
		{
			i++;
		}
    }
    else  // Wait until the byte is sent
        while( !(UCSRA&0x40) );
     2c4:	80 91 c0 00 	lds	r24, 0x00C0
     2c8:	86 ff       	sbrs	r24, 6
     2ca:	fc cf       	rjmp	.-8      	; 0x2c4 <sendChar+0x26>
        
    	// Clear the TXCflag        
	UCSRA=UCSRA|0x40;          
     2cc:	80 91 c0 00 	lds	r24, 0x00C0
     2d0:	80 64       	ori	r24, 0x40	; 64
     2d2:	80 93 c0 00 	sts	0x00C0, r24
}
     2d6:	08 95       	ret

000002d8 <sendString>:

void sendString(char s[])
{
     2d8:	0f 93       	push	r16
     2da:	1f 93       	push	r17
     2dc:	cf 93       	push	r28
     2de:	df 93       	push	r29
     2e0:	8c 01       	movw	r16, r24
     2e2:	c0 e0       	ldi	r28, 0x00	; 0
     2e4:	d0 e0       	ldi	r29, 0x00	; 0
	int i = 0;
	
	while(i < 64) // don't get stuck if it is a bad string
	{
		if( s[i] == '\0' ) break; // quit on string terminator
     2e6:	f8 01       	movw	r30, r16
     2e8:	ec 0f       	add	r30, r28
     2ea:	fd 1f       	adc	r31, r29
     2ec:	80 81       	ld	r24, Z
     2ee:	88 23       	and	r24, r24
     2f0:	31 f0       	breq	.+12     	; 0x2fe <sendString+0x26>
		sendChar(s[i++]);
     2f2:	21 96       	adiw	r28, 0x01	; 1
     2f4:	0e 94 4f 01 	call	0x29e	; 0x29e <sendChar>

void sendString(char s[])
{
	int i = 0;
	
	while(i < 64) // don't get stuck if it is a bad string
     2f8:	c0 34       	cpi	r28, 0x40	; 64
     2fa:	d1 05       	cpc	r29, r1
     2fc:	a1 f7       	brne	.-24     	; 0x2e6 <sendString+0xe>
	{
		if( s[i] == '\0' ) break; // quit on string terminator
		sendChar(s[i++]);
	}
}
     2fe:	df 91       	pop	r29
     300:	cf 91       	pop	r28
     302:	1f 91       	pop	r17
     304:	0f 91       	pop	r16
     306:	08 95       	ret

00000308 <sendFString>:

// Send a string located in Flash ROM
void sendFString(const char *pFlashStr)
{
     308:	0f 93       	push	r16
     30a:	1f 93       	push	r17
     30c:	cf 93       	push	r28
     30e:	df 93       	push	r29
     310:	8c 01       	movw	r16, r24
     312:	c0 e0       	ldi	r28, 0x00	; 0
     314:	d0 e0       	ldi	r29, 0x00	; 0
     316:	02 c0       	rjmp	.+4      	; 0x31c <sendFString+0x14>
	// '\0' is 'null' and terminates C strings
	// The 60 prevents too much overrun if we get a bad pointer
	// and it limits the string size
	for (i = 0; pgm_read_byte(&pFlashStr[i]) && i < 60; i++)
    {
		sendChar(pgm_read_byte(&pFlashStr[i]));
     318:	0e 94 4f 01 	call	0x29e	; 0x29e <sendChar>
     31c:	f8 01       	movw	r30, r16
     31e:	ec 0f       	add	r30, r28
     320:	fd 1f       	adc	r31, r29

	// The 'for' logic terminates if the byte is '\0' or if i = 60.
	// '\0' is 'null' and terminates C strings
	// The 60 prevents too much overrun if we get a bad pointer
	// and it limits the string size
	for (i = 0; pgm_read_byte(&pFlashStr[i]) && i < 60; i++)
     322:	84 91       	lpm	r24, Z+
     324:	88 23       	and	r24, r24
     326:	21 f0       	breq	.+8      	; 0x330 <sendFString+0x28>
     328:	21 96       	adiw	r28, 0x01	; 1
     32a:	cd 33       	cpi	r28, 0x3D	; 61
     32c:	d1 05       	cpc	r29, r1
     32e:	a1 f7       	brne	.-24     	; 0x318 <sendFString+0x10>
    {
		sendChar(pgm_read_byte(&pFlashStr[i]));
	}
}
     330:	df 91       	pop	r29
     332:	cf 91       	pop	r28
     334:	1f 91       	pop	r17
     336:	0f 91       	pop	r16
     338:	08 95       	ret

0000033a <USARTinit>:


void USARTinit()
{
     33a:	e1 e6       	ldi	r30, 0x61	; 97
     33c:	f0 e0       	ldi	r31, 0x00	; 0
     33e:	80 e8       	ldi	r24, 0x80	; 128
     340:	80 83       	st	Z, r24
    // Increase the oscillator to 2 Mhz for the 19200 baudrate:  
    CLKPR = (1<<CLKPCE);        // set Clock Prescaler Change Enable
    // set prescaler = 4, Inter RC 8Mhz / 4 = 2Mhz
    CLKPR = (1<<CLKPS1);    
     342:	92 e0       	ldi	r25, 0x02	; 2
     344:	90 83       	st	Z, r25

    // Set the USART baudrate registers for 19200
    UBRRH = 0;//(unsigned char)(baudrate>>8);
     346:	10 92 c5 00 	sts	0x00C5, r1
    UBRRL = 12;//(unsigned char)baudrate;
     34a:	8c e0       	ldi	r24, 0x0C	; 12
     34c:	80 93 c4 00 	sts	0x00C4, r24

    // Enable 2x speed change
    UCSRA = (1<<U2X);
     350:	90 93 c0 00 	sts	0x00C0, r25

    // Enable receiver and transmitter
    UCSRB = (1<<RXEN)|(1<<TXEN)|(0<<RXCIE)|(0<<UDRIE);
     354:	88 e1       	ldi	r24, 0x18	; 24
     356:	80 93 c1 00 	sts	0x00C1, r24

    // Set the USART to asynchronous at 8 bits no parity and 1 stop bit
    UCSRC = (0<<UMSEL)|(0<<UPM0)|(0<<USBS)|(3<<UCSZ0)|(0<<UCPOL);
     35a:	86 e0       	ldi	r24, 0x06	; 6
     35c:	80 93 c2 00 	sts	0x00C2, r24
        
    // Enable interrupts
    sei(); 
     360:	78 94       	sei
    
    // Setup the interrupt mask and flags
	PCMSK1 = (1<<PINB6) | (1<<PINB4);       // set pin-change interrupt mask
     362:	80 e5       	ldi	r24, 0x50	; 80
     364:	80 93 6c 00 	sts	0x006C, r24
  	EIFR   = (1<<PCIF1);                    // clear external intterupt flag 1
     368:	80 e8       	ldi	r24, 0x80	; 128
     36a:	8c bb       	out	0x1c, r24	; 28
	EIMSK  = (1<<PCIE1);                // enable external interrupt 1    
     36c:	8d bb       	out	0x1d, r24	; 29
}
     36e:	08 95       	ret

00000370 <OSCCAL_calibration>:


//Calibrate the internal OSCCAL byte, using the external 
//32,768 kHz crystal as reference
void OSCCAL_calibration(void)
{
     370:	80 e8       	ldi	r24, 0x80	; 128
     372:	80 93 61 00 	sts	0x0061, r24
    int temp;
    unsigned char tempL;

    CLKPR = (1<<CLKPCE);        // set Clock Prescaler Change Enable
    // set prescaler = 8, Inter RC 8Mhz / 8 = 1Mhz
    CLKPR = (1<<CLKPS1) | (1<<CLKPS0);
     376:	83 e0       	ldi	r24, 0x03	; 3
     378:	80 93 61 00 	sts	0x0061, r24
    
    TIMSK2 = 0;             //disable OCIE2A and TOIE2
     37c:	10 92 70 00 	sts	0x0070, r1

    ASSR = (1<<AS2);        //select asynchronous operation of timer2 (32,768kHz)
     380:	88 e0       	ldi	r24, 0x08	; 8
     382:	80 93 b6 00 	sts	0x00B6, r24
    
    OCR2A = 200;            // set timer2 compare value 
     386:	88 ec       	ldi	r24, 0xC8	; 200
     388:	80 93 b3 00 	sts	0x00B3, r24

    TIMSK0 = 0;             // delete any interrupt sources
     38c:	10 92 6e 00 	sts	0x006E, r1
        
    TCCR1B = (1<<CS10);     // start timer1 with no prescaling
     390:	81 e0       	ldi	r24, 0x01	; 1
     392:	80 93 81 00 	sts	0x0081, r24
    TCCR2A = (1<<CS20);     // start timer2 with no prescaling
     396:	80 93 b0 00 	sts	0x00B0, r24

    while((ASSR & 0x01) | (ASSR & 0x04));       //wait for TCN2UB and TCR2UB to be cleared
     39a:	20 91 b6 00 	lds	r18, 0x00B6
     39e:	80 91 b6 00 	lds	r24, 0x00B6
     3a2:	90 e0       	ldi	r25, 0x00	; 0
     3a4:	84 70       	andi	r24, 0x04	; 4
     3a6:	90 70       	andi	r25, 0x00	; 0
     3a8:	30 e0       	ldi	r19, 0x00	; 0
     3aa:	21 70       	andi	r18, 0x01	; 1
     3ac:	30 70       	andi	r19, 0x00	; 0
     3ae:	82 2b       	or	r24, r18
     3b0:	93 2b       	or	r25, r19
     3b2:	89 2b       	or	r24, r25
     3b4:	91 f7       	brne	.-28     	; 0x39a <OSCCAL_calibration+0x2a>
     3b6:	80 e0       	ldi	r24, 0x00	; 0
     3b8:	90 e0       	ldi	r25, 0x00	; 0
    milliseconds can be achieved.
 */
void
_delay_loop_2(uint16_t __count)
{
	__asm__ volatile (
     3ba:	20 e3       	ldi	r18, 0x30	; 48
     3bc:	35 e7       	ldi	r19, 0x75	; 117
     3be:	f9 01       	movw	r30, r18
     3c0:	31 97       	sbiw	r30, 0x01	; 1
     3c2:	f1 f7       	brne	.-4      	; 0x3c0 <OSCCAL_calibration+0x50>

    // wait for external crystal to stabilise
	for(int i = 0; i < 10; i++)
     3c4:	01 96       	adiw	r24, 0x01	; 1
     3c6:	8a 30       	cpi	r24, 0x0A	; 10
     3c8:	91 05       	cpc	r25, r1
     3ca:	c9 f7       	brne	.-14     	; 0x3be <OSCCAL_calibration+0x4e>
			
    while(!calibrate)
    {
        cli(); // mt __disable_interrupt();  // disable global interrupt
        
        TIFR1 = 0xFF;   // delete TIFR1 flags
     3cc:	4f ef       	ldi	r20, 0xFF	; 255
    
        if (temp > 6250)
        {
            OSCCAL--;   // the internRC oscillator runs to fast, decrease the OSCCAL
        }
        else if (temp < 6120)
     3ce:	51 e0       	ldi	r21, 0x01	; 1
	for(int i = 0; i < 10; i++)
			_delay_loop_2(30000);   
			
    while(!calibrate)
    {
        cli(); // mt __disable_interrupt();  // disable global interrupt
     3d0:	f8 94       	cli
        
        TIFR1 = 0xFF;   // delete TIFR1 flags
     3d2:	46 bb       	out	0x16, r20	; 22
        TIFR2 = 0xFF;   // delete TIFR2 flags
     3d4:	47 bb       	out	0x17, r20	; 23
        
        TCNT1H = 0;     // clear timer1 counter
     3d6:	10 92 85 00 	sts	0x0085, r1
        TCNT1L = 0;
     3da:	10 92 84 00 	sts	0x0084, r1
        TCNT2 = 0;      // clear timer2 counter
     3de:	10 92 b2 00 	sts	0x00B2, r1
           
        while ( !(TIFR2 && (1<<OCF2A)) );   // wait for timer2 compareflag
     3e2:	87 b3       	in	r24, 0x17	; 23
     3e4:	88 23       	and	r24, r24
     3e6:	e9 f3       	breq	.-6      	; 0x3e2 <OSCCAL_calibration+0x72>
    
        TCCR1B = 0; // stop timer1
     3e8:	10 92 81 00 	sts	0x0081, r1

        sei(); // __enable_interrupt();  // enable global interrupt
     3ec:	78 94       	sei
    
        if ( (TIFR1 && (1<<TOV1)) )
     3ee:	86 b3       	in	r24, 0x16	; 22
     3f0:	88 23       	and	r24, r24
     3f2:	b9 f4       	brne	.+46     	; 0x422 <OSCCAL_calibration+0xb2>
        {
            temp = 0xFFFF;      // if timer1 overflows, set the temp to 0xFFFF
        }
        else
        {   // read out the timer1 counter value
            tempL = TCNT1L;
     3f4:	90 91 84 00 	lds	r25, 0x0084
            temp = TCNT1H;
     3f8:	80 91 85 00 	lds	r24, 0x0085
            temp = (temp << 8);
     3fc:	38 2f       	mov	r19, r24
     3fe:	20 e0       	ldi	r18, 0x00	; 0
            temp += tempL;
     400:	b9 01       	movw	r22, r18
     402:	69 0f       	add	r22, r25
     404:	71 1d       	adc	r23, r1
     406:	cb 01       	movw	r24, r22
        }
    
        if (temp > 6250)
     408:	78 e1       	ldi	r23, 0x18	; 24
     40a:	8b 36       	cpi	r24, 0x6B	; 107
     40c:	97 07       	cpc	r25, r23
     40e:	24 f0       	brlt	.+8      	; 0x418 <OSCCAL_calibration+0xa8>
        {
            OSCCAL--;   // the internRC oscillator runs to fast, decrease the OSCCAL
     410:	80 91 66 00 	lds	r24, 0x0066
     414:	81 50       	subi	r24, 0x01	; 1
     416:	08 c0       	rjmp	.+16     	; 0x428 <OSCCAL_calibration+0xb8>
        }
        else if (temp < 6120)
     418:	88 5e       	subi	r24, 0xE8	; 232
     41a:	97 41       	sbci	r25, 0x17	; 23
     41c:	14 f0       	brlt	.+4      	; 0x422 <OSCCAL_calibration+0xb2>
     41e:	81 e0       	ldi	r24, 0x01	; 1
     420:	06 c0       	rjmp	.+12     	; 0x42e <OSCCAL_calibration+0xbe>
        {
            OSCCAL++;   // the internRC oscillator runs to slow, increase the OSCCAL
     422:	80 91 66 00 	lds	r24, 0x0066
     426:	8f 5f       	subi	r24, 0xFF	; 255
     428:	80 93 66 00 	sts	0x0066, r24
     42c:	80 e0       	ldi	r24, 0x00	; 0
        }
        else
            calibrate = 1;//TRUE;   // the interRC is correct
    
        TCCR1B = (1<<CS10); // start timer1
     42e:	50 93 81 00 	sts	0x0081, r21

    // wait for external crystal to stabilise
	for(int i = 0; i < 10; i++)
			_delay_loop_2(30000);   
			
    while(!calibrate)
     432:	88 23       	and	r24, r24
     434:	69 f2       	breq	.-102    	; 0x3d0 <OSCCAL_calibration+0x60>
        else
            calibrate = 1;//TRUE;   // the interRC is correct
    
        TCCR1B = (1<<CS10); // start timer1
    }
}
     436:	08 95       	ret

00000438 <main>:
char state = STATE_WAIT_FOR_START;
volatile uint8_t dataReady = SRF_FALSE; // When true, range data is ready
uint16_t * dataArray = NULL;
uint8_t lcdDisplay = SRF_TRUE;
int main(void)
{
     438:	2f 92       	push	r2
     43a:	3f 92       	push	r3
     43c:	4f 92       	push	r4
     43e:	5f 92       	push	r5
     440:	6f 92       	push	r6
     442:	7f 92       	push	r7
     444:	8f 92       	push	r8
     446:	9f 92       	push	r9
     448:	af 92       	push	r10
     44a:	bf 92       	push	r11
     44c:	cf 92       	push	r12
     44e:	df 92       	push	r13
     450:	ef 92       	push	r14
     452:	ff 92       	push	r15
     454:	0f 93       	push	r16
     456:	1f 93       	push	r17
     458:	df 93       	push	r29
     45a:	cf 93       	push	r28
     45c:	cd b7       	in	r28, 0x3d	; 61
     45e:	de b7       	in	r29, 0x3e	; 62
     460:	c2 58       	subi	r28, 0x82	; 130
     462:	d0 40       	sbci	r29, 0x00	; 0
     464:	0f b6       	in	r0, 0x3f	; 63
     466:	f8 94       	cli
     468:	de bf       	out	0x3e, r29	; 62
     46a:	0f be       	out	0x3f, r0	; 63
     46c:	cd bf       	out	0x3d, r28	; 61
	char string[64];
	unsigned char count = 0;
	
	
	// run the initialization routines
	initializer();
     46e:	0e 94 39 01 	call	0x272	; 0x272 <initializer>
     472:	ff 24       	eor	r15, r15
	 {
		// Check to see if a character is waiting
		while( isCharAvailable() == 1 )
		{
			// If a new character is received, get it
			string[count++] = receiveChar();
     474:	5e 01       	movw	r10, r28
     476:	08 94       	sec
     478:	a1 1c       	adc	r10, r1
     47a:	b1 1c       	adc	r11, r1
			// Clear interrupts so that the values can not be changed
			// while writing them to the PC
			cli();

			// Create a string to send to the PC
			char message[64] = "D";
     47c:	71 e4       	ldi	r23, 0x41	; 65
     47e:	c7 2e       	mov	r12, r23
     480:	d1 2c       	mov	r13, r1
     482:	cc 0e       	add	r12, r28
     484:	dd 1e       	adc	r13, r29
     486:	64 e4       	ldi	r22, 0x44	; 68
     488:	66 2e       	mov	r6, r22
     48a:	71 2c       	mov	r7, r1
     48c:	81 2c       	mov	r8, r1
     48e:	91 2c       	mov	r9, r1
     490:	ce 01       	movw	r24, r28
     492:	8b 5b       	subi	r24, 0xBB	; 187
     494:	9f 4f       	sbci	r25, 0xFF	; 255
     496:	cf 57       	subi	r28, 0x7F	; 127
     498:	df 4f       	sbci	r29, 0xFF	; 255
     49a:	99 83       	std	Y+1, r25	; 0x01
     49c:	88 83       	st	Y, r24
     49e:	c1 58       	subi	r28, 0x81	; 129
     4a0:	d0 40       	sbci	r29, 0x00	; 0
     4a2:	5c e3       	ldi	r21, 0x3C	; 60
     4a4:	e5 2e       	mov	r14, r21
			for( int i=0; i<numSonar; i++ )
			{
				sprintf( message, "%s,%d", message, dataArray[i] );
     4a6:	4e e9       	ldi	r20, 0x9E	; 158
     4a8:	24 2e       	mov	r2, r20
     4aa:	41 e0       	ldi	r20, 0x01	; 1
     4ac:	34 2e       	mov	r3, r20
#endif				



			// Add the trailing \n
			sprintf( message, "%s\n", message );
     4ae:	34 ea       	ldi	r19, 0xA4	; 164
     4b0:	43 2e       	mov	r4, r19
     4b2:	31 e0       	ldi	r19, 0x01	; 1
     4b4:	53 2e       	mov	r5, r19
     4b6:	11 c0       	rjmp	.+34     	; 0x4da <main+0xa2>
			string[count++] = receiveChar();
			
			// receive a packet up to 64 bytes long
			if( string[count-1] == '\n' )
			{	
				string[count-1] = '\0'; //convert to a string
     4b8:	10 82       	st	Z, r1
				state = parseInput( string );
     4ba:	c5 01       	movw	r24, r10
     4bc:	0e 94 83 00 	call	0x106	; 0x106 <parseInput>
     4c0:	80 93 d1 01 	sts	0x01D1, r24
				string[0] = '\0';
     4c4:	19 82       	std	Y+1, r1	; 0x01
     4c6:	08 c0       	rjmp	.+16     	; 0x4d8 <main+0xa0>
				count = 0;
			}
			else if( count > 63 )
     4c8:	9f e3       	ldi	r25, 0x3F	; 63
     4ca:	9f 15       	cp	r25, r15
     4cc:	30 f4       	brcc	.+12     	; 0x4da <main+0xa2>
			{
				count = 0;
				string[0] = '\0';
     4ce:	19 82       	std	Y+1, r1	; 0x01
				sendString( "Error - buffer overflow\n" );			
     4d0:	85 e8       	ldi	r24, 0x85	; 133
     4d2:	91 e0       	ldi	r25, 0x01	; 1
     4d4:	0e 94 6c 01 	call	0x2d8	; 0x2d8 <sendString>
     4d8:	ff 24       	eor	r15, r15

char isCharAvailable()
{	
	// Does the RX0 bit of the USART Status and Control Register
	// indicate a char has been received?
	if ( (UCSRA & (0x80)) ) return 1;
     4da:	80 91 c0 00 	lds	r24, 0x00C0
     4de:	87 ff       	sbrs	r24, 7
     4e0:	67 c0       	rjmp	.+206    	; 0x5b0 <__stack+0xb1>
}

char receiveChar()
{
	// Return the char in the UDR0 register
	return UDR;
     4e2:	80 91 c6 00 	lds	r24, 0x00C6
	 {
		// Check to see if a character is waiting
		while( isCharAvailable() == 1 )
		{
			// If a new character is received, get it
			string[count++] = receiveChar();
     4e6:	f5 01       	movw	r30, r10
     4e8:	ef 0d       	add	r30, r15
     4ea:	f1 1d       	adc	r31, r1
     4ec:	80 83       	st	Z, r24
     4ee:	f3 94       	inc	r15
			
			// receive a packet up to 64 bytes long
			if( string[count-1] == '\n' )
     4f0:	ef 2d       	mov	r30, r15
     4f2:	f0 e0       	ldi	r31, 0x00	; 0
     4f4:	31 97       	sbiw	r30, 0x01	; 1
     4f6:	ea 0d       	add	r30, r10
     4f8:	fb 1d       	adc	r31, r11
     4fa:	80 81       	ld	r24, Z
     4fc:	8a 30       	cpi	r24, 0x0A	; 10
     4fe:	21 f7       	brne	.-56     	; 0x4c8 <main+0x90>
     500:	db cf       	rjmp	.-74     	; 0x4b8 <main+0x80>
		if( dataReady == SRF_TRUE ) 
		{
			// A message to send is ready
			// Clear interrupts so that the values can not be changed
			// while writing them to the PC
			cli();
     502:	f8 94       	cli

			// Create a string to send to the PC
			char message[64] = "D";
     504:	f6 01       	movw	r30, r12
     506:	60 82       	st	Z, r6
     508:	71 82       	std	Z+1, r7	; 0x01
     50a:	82 82       	std	Z+2, r8	; 0x02
     50c:	93 82       	std	Z+3, r9	; 0x03
     50e:	cf 57       	subi	r28, 0x7F	; 127
     510:	df 4f       	sbci	r29, 0xFF	; 255
     512:	e8 81       	ld	r30, Y
     514:	f9 81       	ldd	r31, Y+1	; 0x01
     516:	c1 58       	subi	r28, 0x81	; 129
     518:	d0 40       	sbci	r29, 0x00	; 0
     51a:	8e 2d       	mov	r24, r14
     51c:	11 92       	st	Z+, r1
     51e:	8a 95       	dec	r24
     520:	e9 f7       	brne	.-6      	; 0x51c <__stack+0x1d>
     522:	00 e0       	ldi	r16, 0x00	; 0
     524:	10 e0       	ldi	r17, 0x00	; 0
     526:	1f c0       	rjmp	.+62     	; 0x566 <__stack+0x67>
			for( int i=0; i<numSonar; i++ )
			{
				sprintf( message, "%s,%d", message, dataArray[i] );
     528:	c8 01       	movw	r24, r16
     52a:	88 0f       	add	r24, r24
     52c:	99 1f       	adc	r25, r25
     52e:	e0 91 d3 01 	lds	r30, 0x01D3
     532:	f0 91 d4 01 	lds	r31, 0x01D4
     536:	e8 0f       	add	r30, r24
     538:	f9 1f       	adc	r31, r25
     53a:	80 81       	ld	r24, Z
     53c:	91 81       	ldd	r25, Z+1	; 0x01
     53e:	9f 93       	push	r25
     540:	8f 93       	push	r24
     542:	df 92       	push	r13
     544:	cf 92       	push	r12
     546:	3f 92       	push	r3
     548:	2f 92       	push	r2
     54a:	df 92       	push	r13
     54c:	cf 92       	push	r12
     54e:	0e 94 95 08 	call	0x112a	; 0x112a <sprintf>
			// while writing them to the PC
			cli();

			// Create a string to send to the PC
			char message[64] = "D";
			for( int i=0; i<numSonar; i++ )
     552:	0f 5f       	subi	r16, 0xFF	; 255
     554:	1f 4f       	sbci	r17, 0xFF	; 255
     556:	ed b7       	in	r30, 0x3d	; 61
     558:	fe b7       	in	r31, 0x3e	; 62
     55a:	38 96       	adiw	r30, 0x08	; 8
     55c:	0f b6       	in	r0, 0x3f	; 63
     55e:	f8 94       	cli
     560:	fe bf       	out	0x3e, r31	; 62
     562:	0f be       	out	0x3f, r0	; 63
     564:	ed bf       	out	0x3d, r30	; 61
     566:	80 91 d0 01 	lds	r24, 0x01D0
     56a:	90 e0       	ldi	r25, 0x00	; 0
     56c:	08 17       	cp	r16, r24
     56e:	19 07       	cpc	r17, r25
     570:	dc f2       	brlt	.-74     	; 0x528 <__stack+0x29>
			{
				sprintf( message, "%s,%d", message, dataArray[i] );
			}

			// Be sure to turn off the flag saying that data is ready
			dataReady = SRF_FALSE;
     572:	10 92 d2 01 	sts	0x01D2, r1

			// Since we are finished using the data array and
			// the dataReady flag has been reset, we can safely
			// reenable interrupts
			sei();
     576:	78 94       	sei


#ifdef SRF_USE_LCD
			// Only output to the LCD every few seconds
			if( lcdDisplay == SRF_TRUE )
     578:	80 91 a8 01 	lds	r24, 0x01A8
     57c:	81 30       	cpi	r24, 0x01	; 1
     57e:	21 f4       	brne	.+8      	; 0x588 <__stack+0x89>
			{
				LCD_puts( message, 1 );
     580:	61 e0       	ldi	r22, 0x01	; 1
     582:	c6 01       	movw	r24, r12
     584:	0e 94 fe 04 	call	0x9fc	; 0x9fc <LCD_puts>
#endif				



			// Add the trailing \n
			sprintf( message, "%s\n", message );
     588:	df 92       	push	r13
     58a:	cf 92       	push	r12
     58c:	5f 92       	push	r5
     58e:	4f 92       	push	r4
     590:	df 92       	push	r13
     592:	cf 92       	push	r12
     594:	0e 94 95 08 	call	0x112a	; 0x112a <sprintf>

			// Send the string with each value separated by commas
			sendString( message );
     598:	c6 01       	movw	r24, r12
     59a:	0e 94 6c 01 	call	0x2d8	; 0x2d8 <sendString>
     59e:	8d b7       	in	r24, 0x3d	; 61
     5a0:	9e b7       	in	r25, 0x3e	; 62
     5a2:	06 96       	adiw	r24, 0x06	; 6
     5a4:	0f b6       	in	r0, 0x3f	; 63
     5a6:	f8 94       	cli
     5a8:	9e bf       	out	0x3e, r25	; 62
     5aa:	0f be       	out	0x3f, r0	; 63
     5ac:	8d bf       	out	0x3d, r24	; 61
     5ae:	95 cf       	rjmp	.-214    	; 0x4da <main+0xa2>
				sendString( "Error - buffer overflow\n" );			
			}		
		}

		// Check for range data to be sent to the PC
		if( dataReady == SRF_TRUE ) 
     5b0:	80 91 d2 01 	lds	r24, 0x01D2
     5b4:	81 30       	cpi	r24, 0x01	; 1
     5b6:	09 f0       	breq	.+2      	; 0x5ba <__stack+0xbb>
     5b8:	90 cf       	rjmp	.-224    	; 0x4da <main+0xa2>
     5ba:	a3 cf       	rjmp	.-186    	; 0x502 <__stack+0x3>

000005bc <USI_TWI_Master_Initialise>:

/*---------------------------------------------------------------
 USI TWI single master initialization function
---------------------------------------------------------------*/
void USI_TWI_Master_Initialise( void )
{
     5bc:	75 9a       	sbi	0x0e, 5	; 14
  PORT_USI |= (1<<PIN_USI_SDA);           // Enable pullup on SDA, to set high as released state.
  PORT_USI |= (1<<PIN_USI_SCL);           // Enable pullup on SCL, to set high as released state.
     5be:	74 9a       	sbi	0x0e, 4	; 14
  
  DDR_USI  |= (1<<PIN_USI_SCL);           // Enable SCL as output.
     5c0:	6c 9a       	sbi	0x0d, 4	; 13
  DDR_USI  |= (1<<PIN_USI_SDA);           // Enable SDA as output.
     5c2:	6d 9a       	sbi	0x0d, 5	; 13
  
  USIDR    =  0xFF;                       // Preload dataregister with "released level" data.
     5c4:	8f ef       	ldi	r24, 0xFF	; 255
     5c6:	80 93 ba 00 	sts	0x00BA, r24
  USICR    =  (0<<USISIE)|(0<<USIOIE)|                            // Disable Interrupts.
     5ca:	8a e2       	ldi	r24, 0x2A	; 42
     5cc:	80 93 b8 00 	sts	0x00B8, r24
              (1<<USIWM1)|(0<<USIWM0)|                            // Set USI in Two-wire mode.
              (1<<USICS1)|(0<<USICS0)|(1<<USICLK)|                // Software stobe as counter clock source
              (0<<USITC);
  USISR   =   (1<<USISIF)|(1<<USIOIF)|(1<<USIPF)|(1<<USIDC)|      // Clear flags,
     5d0:	80 ef       	ldi	r24, 0xF0	; 240
     5d2:	80 93 b9 00 	sts	0x00B9, r24
              (0x0<<USICNT0);                                     // and reset counter.
}
     5d6:	08 95       	ret

000005d8 <USI_TWI_Get_State_Info>:

/*---------------------------------------------------------------
Use this function to get hold of the error message from the last transmission
---------------------------------------------------------------*/
unsigned char USI_TWI_Get_State_Info( void )
{
     5d8:	80 91 da 01 	lds	r24, 0x01DA
     5dc:	08 95       	ret

000005de <USI_TWI_Master_Transfer>:
 Core function for shifting data in and out from the USI.
 Data to be sent has to be placed into the USIDR prior to calling
 this function. Data read, will be return'ed from the function.
---------------------------------------------------------------*/
unsigned char USI_TWI_Master_Transfer( unsigned char temp )
{
     5de:	80 93 b9 00 	sts	0x00B9, r24
    can be achieved.
*/
void
_delay_loop_1(uint8_t __count)
{
	__asm__ volatile (
     5e2:	33 e0       	ldi	r19, 0x03	; 3
           (1<<USICS1)|(0<<USICS0)|(1<<USICLK)|     // Software clock strobe as source.
           (1<<USITC);                              // Toggle Clock Port.
  do
  { 
	_delay_us(T2_TWI);
    USICR = temp;                          // Generate positve SCL edge.
     5e4:	9b e2       	ldi	r25, 0x2B	; 43
     5e6:	22 e0       	ldi	r18, 0x02	; 2
     5e8:	83 2f       	mov	r24, r19
     5ea:	8a 95       	dec	r24
     5ec:	f1 f7       	brne	.-4      	; 0x5ea <USI_TWI_Master_Transfer+0xc>
     5ee:	90 93 b8 00 	sts	0x00B8, r25
    while( !(PIN_USI & (1<<PIN_USI_SCL)) );// Wait for SCL to go high.
     5f2:	64 9b       	sbis	0x0c, 4	; 12
     5f4:	fe cf       	rjmp	.-4      	; 0x5f2 <USI_TWI_Master_Transfer+0x14>
     5f6:	82 2f       	mov	r24, r18
     5f8:	8a 95       	dec	r24
     5fa:	f1 f7       	brne	.-4      	; 0x5f8 <USI_TWI_Master_Transfer+0x1a>
	_delay_us(T4_TWI);
    USICR = temp;                          // Generate negative SCL edge.
     5fc:	90 93 b8 00 	sts	0x00B8, r25
  }while( !(USISR & (1<<USIOIF)) );        // Check for transfer complete.
     600:	80 91 b9 00 	lds	r24, 0x00B9
     604:	86 ff       	sbrs	r24, 6
     606:	f0 cf       	rjmp	.-32     	; 0x5e8 <USI_TWI_Master_Transfer+0xa>
     608:	83 e0       	ldi	r24, 0x03	; 3
     60a:	8a 95       	dec	r24
     60c:	f1 f7       	brne	.-4      	; 0x60a <USI_TWI_Master_Transfer+0x2c>
  
	_delay_us(T2_TWI);
  temp  = USIDR;                           // Read out data.
     60e:	80 91 ba 00 	lds	r24, 0x00BA
  USIDR = 0xFF;                            // Release SDA.
     612:	9f ef       	ldi	r25, 0xFF	; 255
     614:	90 93 ba 00 	sts	0x00BA, r25
  DDR_USI |= (1<<PIN_USI_SDA);             // Enable SDA as output.
     618:	6d 9a       	sbi	0x0d, 5	; 13

  return temp;                             // Return the data from the USIDR
}
     61a:	08 95       	ret

0000061c <USI_TWI_Master_Start>:
/*---------------------------------------------------------------
 Function for generating a TWI Start Condition. 
---------------------------------------------------------------*/
unsigned char USI_TWI_Master_Start( void )
{
     61c:	74 9a       	sbi	0x0e, 4	; 14
/* Release SCL to ensure that (repeated) Start can be performed */
  PORT_USI |= (1<<PIN_USI_SCL);                     // Release SCL.
  while( !(PORT_USI & (1<<PIN_USI_SCL)) );          // Verify that SCL becomes high.
     61e:	74 9b       	sbis	0x0e, 4	; 14
     620:	fe cf       	rjmp	.-4      	; 0x61e <USI_TWI_Master_Start+0x2>
     622:	93 e0       	ldi	r25, 0x03	; 3
     624:	89 2f       	mov	r24, r25
     626:	8a 95       	dec	r24
     628:	f1 f7       	brne	.-4      	; 0x626 <USI_TWI_Master_Start+0xa>
  _delay_us(T2_TWI);

/* Generate Start Condition */
  PORT_USI &= ~(1<<PIN_USI_SDA);                    // Force SDA LOW.
     62a:	75 98       	cbi	0x0e, 5	; 14
     62c:	82 e0       	ldi	r24, 0x02	; 2
     62e:	8a 95       	dec	r24
     630:	f1 f7       	brne	.-4      	; 0x62e <USI_TWI_Master_Start+0x12>
	_delay_us(T4_TWI);                         
  PORT_USI &= ~(1<<PIN_USI_SCL);                    // Pull SCL LOW.
     632:	74 98       	cbi	0x0e, 4	; 14
  PORT_USI |= (1<<PIN_USI_SDA);                     // Release SDA.
     634:	75 9a       	sbi	0x0e, 5	; 14

#ifdef SIGNAL_VERIFY
  if( !(USISR & (1<<USISIF)) )
     636:	80 91 b9 00 	lds	r24, 0x00B9
     63a:	87 ff       	sbrs	r24, 7
     63c:	02 c0       	rjmp	.+4      	; 0x642 <USI_TWI_Master_Start+0x26>
     63e:	81 e0       	ldi	r24, 0x01	; 1
     640:	08 95       	ret
  {
    USI_TWI_state.errorState = USI_TWI_MISSING_START_CON;  
     642:	90 93 da 01 	sts	0x01DA, r25
     646:	80 e0       	ldi	r24, 0x00	; 0
    return (FALSE);
  }
#endif
  return (TRUE);
}
     648:	08 95       	ret

0000064a <USI_TWI_Master_Stop>:
/*---------------------------------------------------------------
 Function for generating a TWI Stop Condition. Used to release 
 the TWI bus.
---------------------------------------------------------------*/
unsigned char USI_TWI_Master_Stop( void )
{
     64a:	75 98       	cbi	0x0e, 5	; 14
  PORT_USI &= ~(1<<PIN_USI_SDA);           // Pull SDA low.
  PORT_USI |= (1<<PIN_USI_SCL);            // Release SCL.
     64c:	74 9a       	sbi	0x0e, 4	; 14
  while( !(PIN_USI & (1<<PIN_USI_SCL)) );  // Wait for SCL to go high.  
     64e:	64 9b       	sbis	0x0c, 4	; 12
     650:	fe cf       	rjmp	.-4      	; 0x64e <USI_TWI_Master_Stop+0x4>
     652:	82 e0       	ldi	r24, 0x02	; 2
     654:	8a 95       	dec	r24
     656:	f1 f7       	brne	.-4      	; 0x654 <USI_TWI_Master_Stop+0xa>
	_delay_us(T4_TWI);
  PORT_USI |= (1<<PIN_USI_SDA);            // Release SDA.
     658:	75 9a       	sbi	0x0e, 5	; 14
     65a:	83 e0       	ldi	r24, 0x03	; 3
     65c:	8a 95       	dec	r24
     65e:	f1 f7       	brne	.-4      	; 0x65c <USI_TWI_Master_Stop+0x12>
	_delay_us(T2_TWI);
  
#ifdef SIGNAL_VERIFY
  if( !(USISR & (1<<USIPF)) )
     660:	80 91 b9 00 	lds	r24, 0x00B9
     664:	85 ff       	sbrs	r24, 5
     666:	02 c0       	rjmp	.+4      	; 0x66c <USI_TWI_Master_Stop+0x22>
     668:	81 e0       	ldi	r24, 0x01	; 1
     66a:	08 95       	ret
  {
    USI_TWI_state.errorState = USI_TWI_MISSING_STOP_CON;    
     66c:	84 e0       	ldi	r24, 0x04	; 4
     66e:	80 93 da 01 	sts	0x01DA, r24
     672:	80 e0       	ldi	r24, 0x00	; 0
    return (FALSE);
  }
#endif

  return (TRUE);
}
     674:	08 95       	ret

00000676 <USI_TWI_Start_Transceiver_With_Data>:
 
 Success or error code is returned. Error codes are defined in 
 USI_TWI_Master.h
---------------------------------------------------------------*/
unsigned char USI_TWI_Start_Transceiver_With_Data( unsigned char *msg, unsigned char msgSize)
{
     676:	cf 92       	push	r12
     678:	df 92       	push	r13
     67a:	ef 92       	push	r14
     67c:	ff 92       	push	r15
     67e:	0f 93       	push	r16
     680:	1f 93       	push	r17
     682:	cf 93       	push	r28
     684:	df 93       	push	r29
     686:	8c 01       	movw	r16, r24
     688:	e6 2e       	mov	r14, r22
	unsigned char savedMsgSize; 

//This clear must be done before calling this function so that memReadMode can be specified.
//  USI_TWI_state.errorState = 0;				// Clears all mode bits also

  USI_TWI_state.addressMode = TRUE;			// Always true for first byte
     68a:	90 91 da 01 	lds	r25, 0x01DA
     68e:	89 2f       	mov	r24, r25
     690:	81 60       	ori	r24, 0x01	; 1
     692:	80 93 da 01 	sts	0x01DA, r24
    USI_TWI_state.errorState = USI_TWI_UE_DATA_COL;
    return (FALSE);
  }
#endif

  if ( !(*msg & (1<<TWI_READ_BIT)) )                // The LSB in the address byte determines if is a masterRead or masterWrite operation.
     696:	f8 01       	movw	r30, r16
     698:	80 81       	ld	r24, Z
     69a:	80 fd       	sbrc	r24, 0
     69c:	03 c0       	rjmp	.+6      	; 0x6a4 <USI_TWI_Start_Transceiver_With_Data+0x2e>
  {
    USI_TWI_state.masterWriteDataMode = TRUE;
     69e:	93 60       	ori	r25, 0x03	; 3
     6a0:	90 93 da 01 	sts	0x01DA, r25
//	{
		savedMsg = msg;
		savedMsgSize = msgSize;
//	}

	if ( !USI_TWI_Master_Start( ))
     6a4:	0e 94 0e 03 	call	0x61c	; 0x61c <USI_TWI_Master_Start>
     6a8:	88 23       	and	r24, r24
     6aa:	09 f4       	brne	.+2      	; 0x6ae <USI_TWI_Start_Transceiver_With_Data+0x38>
     6ac:	52 c0       	rjmp	.+164    	; 0x752 <USI_TWI_Start_Transceiver_With_Data+0xdc>
     6ae:	e8 01       	movw	r28, r16
     6b0:	fe 2c       	mov	r15, r14
      *(msg++)  = USI_TWI_Master_Transfer( tempUSISR_8bit );

      /* Prepare to generate ACK (or NACK in case of End Of Transmission) */
      if( msgSize == 1)                            // If transmission of last byte was performed.
      {
        USIDR = 0xFF;                              // Load NACK to confirm End Of Transmission.
     6b2:	cc 24       	eor	r12, r12
     6b4:	ca 94       	dec	r12
	  if ((!USI_TWI_state.addressMode) && USI_TWI_state.memReadMode)// means memory start address has been written
	  {
		msg = savedMsg;					// start at slave address again
		*(msg) |= (TRUE<<TWI_READ_BIT);  // set the Read Bit on Slave address
		USI_TWI_state.errorState = 0;
		USI_TWI_state.addressMode = TRUE;	// Now set up for the Read cycle
     6b6:	dd 24       	eor	r13, r13
     6b8:	d3 94       	inc	r13

/*Write address and Read/Write data */
  do
  {
    /* If masterWrite cycle (or inital address tranmission)*/
    if (USI_TWI_state.addressMode || USI_TWI_state.masterWriteDataMode)
     6ba:	80 91 da 01 	lds	r24, 0x01DA
     6be:	83 70       	andi	r24, 0x03	; 3
     6c0:	81 f1       	breq	.+96     	; 0x722 <USI_TWI_Start_Transceiver_With_Data+0xac>
    {
      /* Write a byte */
      PORT_USI &= ~(1<<PIN_USI_SCL);                // Pull SCL LOW.
     6c2:	74 98       	cbi	0x0e, 4	; 14
      USIDR     = *(msg++);                        // Setup data.
     6c4:	88 81       	ld	r24, Y
     6c6:	80 93 ba 00 	sts	0x00BA, r24
      USI_TWI_Master_Transfer( tempUSISR_8bit );    // Send 8 bits on bus.
     6ca:	80 ef       	ldi	r24, 0xF0	; 240
     6cc:	0e 94 ef 02 	call	0x5de	; 0x5de <USI_TWI_Master_Transfer>
      
      /* Clock and verify (N)ACK from slave */
      DDR_USI  &= ~(1<<PIN_USI_SDA);                // Enable SDA as input.
     6d0:	6d 98       	cbi	0x0d, 5	; 13
      if( USI_TWI_Master_Transfer( tempUSISR_1bit ) & (1<<TWI_NACK_BIT) ) 
     6d2:	8e ef       	ldi	r24, 0xFE	; 254
     6d4:	0e 94 ef 02 	call	0x5de	; 0x5de <USI_TWI_Master_Transfer>
     6d8:	90 91 da 01 	lds	r25, 0x01DA
     6dc:	80 ff       	sbrs	r24, 0
     6de:	09 c0       	rjmp	.+18     	; 0x6f2 <USI_TWI_Start_Transceiver_With_Data+0x7c>
      {
        if ( USI_TWI_state.addressMode )
     6e0:	90 ff       	sbrs	r25, 0
     6e2:	02 c0       	rjmp	.+4      	; 0x6e8 <USI_TWI_Start_Transceiver_With_Data+0x72>
          USI_TWI_state.errorState = USI_TWI_NO_ACK_ON_ADDRESS;
     6e4:	81 e0       	ldi	r24, 0x01	; 1
     6e6:	01 c0       	rjmp	.+2      	; 0x6ea <USI_TWI_Start_Transceiver_With_Data+0x74>
        else
          USI_TWI_state.errorState = USI_TWI_NO_ACK_ON_DATA;
     6e8:	82 e0       	ldi	r24, 0x02	; 2
     6ea:	80 93 da 01 	sts	0x01DA, r24
     6ee:	80 e0       	ldi	r24, 0x00	; 0
     6f0:	30 c0       	rjmp	.+96     	; 0x752 <USI_TWI_Start_Transceiver_With_Data+0xdc>
        return (FALSE);
      }
	  
	  if ((!USI_TWI_state.addressMode) && USI_TWI_state.memReadMode)// means memory start address has been written
     6f2:	89 2f       	mov	r24, r25
     6f4:	85 70       	andi	r24, 0x05	; 5
     6f6:	84 30       	cpi	r24, 0x04	; 4
     6f8:	79 f4       	brne	.+30     	; 0x718 <USI_TWI_Start_Transceiver_With_Data+0xa2>
	  {
		msg = savedMsg;					// start at slave address again
		*(msg) |= (TRUE<<TWI_READ_BIT);  // set the Read Bit on Slave address
     6fa:	f8 01       	movw	r30, r16
     6fc:	80 81       	ld	r24, Z
     6fe:	81 60       	ori	r24, 0x01	; 1
     700:	80 83       	st	Z, r24
		USI_TWI_state.errorState = 0;
		USI_TWI_state.addressMode = TRUE;	// Now set up for the Read cycle
     702:	d0 92 da 01 	sts	0x01DA, r13
		msgSize = savedMsgSize;				// Set byte count correctly
		// NOte that the length should be Slave adrs byte + # bytes to read + 1 (gets decremented below)
		if ( !USI_TWI_Master_Start( ))
     706:	0e 94 0e 03 	call	0x61c	; 0x61c <USI_TWI_Master_Start>
     70a:	88 23       	and	r24, r24
     70c:	19 f0       	breq	.+6      	; 0x714 <USI_TWI_Start_Transceiver_With_Data+0x9e>
     70e:	e8 01       	movw	r28, r16
     710:	fe 2c       	mov	r15, r14
     712:	18 c0       	rjmp	.+48     	; 0x744 <USI_TWI_Start_Transceiver_With_Data+0xce>
		{
			USI_TWI_state.errorState = USI_TWI_BAD_MEM_READ;
     714:	8a e0       	ldi	r24, 0x0A	; 10
     716:	e9 cf       	rjmp	.-46     	; 0x6ea <USI_TWI_Start_Transceiver_With_Data+0x74>
    /* If masterWrite cycle (or inital address tranmission)*/
    if (USI_TWI_state.addressMode || USI_TWI_state.masterWriteDataMode)
    {
      /* Write a byte */
      PORT_USI &= ~(1<<PIN_USI_SCL);                // Pull SCL LOW.
      USIDR     = *(msg++);                        // Setup data.
     718:	21 96       	adiw	r28, 0x01	; 1
			return (FALSE);                           // Send a START condition on the TWI bus.
		}
	  }
	  else
	  {
		USI_TWI_state.addressMode = FALSE;            // Only perform address transmission once.
     71a:	9e 7f       	andi	r25, 0xFE	; 254
     71c:	90 93 da 01 	sts	0x01DA, r25
     720:	11 c0       	rjmp	.+34     	; 0x744 <USI_TWI_Start_Transceiver_With_Data+0xce>
    }
    /* Else masterRead cycle*/
    else
    {
      /* Read a data byte */
      DDR_USI   &= ~(1<<PIN_USI_SDA);               // Enable SDA as input.
     722:	6d 98       	cbi	0x0d, 5	; 13
      *(msg++)  = USI_TWI_Master_Transfer( tempUSISR_8bit );
     724:	80 ef       	ldi	r24, 0xF0	; 240
     726:	0e 94 ef 02 	call	0x5de	; 0x5de <USI_TWI_Master_Transfer>
     72a:	88 83       	st	Y, r24

      /* Prepare to generate ACK (or NACK in case of End Of Transmission) */
      if( msgSize == 1)                            // If transmission of last byte was performed.
     72c:	f1 e0       	ldi	r31, 0x01	; 1
     72e:	ff 16       	cp	r15, r31
     730:	19 f4       	brne	.+6      	; 0x738 <USI_TWI_Start_Transceiver_With_Data+0xc2>
      {
        USIDR = 0xFF;                              // Load NACK to confirm End Of Transmission.
     732:	c0 92 ba 00 	sts	0x00BA, r12
     736:	02 c0       	rjmp	.+4      	; 0x73c <USI_TWI_Start_Transceiver_With_Data+0xc6>
      }
      else
      {
        USIDR = 0x00;                              // Load ACK. Set data register bit 7 (output for SDA) low.
     738:	10 92 ba 00 	sts	0x00BA, r1
    /* Else masterRead cycle*/
    else
    {
      /* Read a data byte */
      DDR_USI   &= ~(1<<PIN_USI_SDA);               // Enable SDA as input.
      *(msg++)  = USI_TWI_Master_Transfer( tempUSISR_8bit );
     73c:	21 96       	adiw	r28, 0x01	; 1
      }
      else
      {
        USIDR = 0x00;                              // Load ACK. Set data register bit 7 (output for SDA) low.
      }
      USI_TWI_Master_Transfer( tempUSISR_1bit );   // Generate ACK/NACK.
     73e:	8e ef       	ldi	r24, 0xFE	; 254
     740:	0e 94 ef 02 	call	0x5de	; 0x5de <USI_TWI_Master_Transfer>
    }
  }while( --msgSize) ;                             // Until all data sent/received.
     744:	fa 94       	dec	r15
     746:	09 f0       	breq	.+2      	; 0x74a <USI_TWI_Start_Transceiver_With_Data+0xd4>
     748:	b8 cf       	rjmp	.-144    	; 0x6ba <USI_TWI_Start_Transceiver_With_Data+0x44>
  
  if (!USI_TWI_Master_Stop())
     74a:	0e 94 25 03 	call	0x64a	; 0x64a <USI_TWI_Master_Stop>
     74e:	81 11       	cpse	r24, r1
     750:	81 e0       	ldi	r24, 0x01	; 1
	return (FALSE);                           // Send a STOP condition on the TWI bus.
	}

/* Transmission successfully completed*/
  return (TRUE);
}
     752:	df 91       	pop	r29
     754:	cf 91       	pop	r28
     756:	1f 91       	pop	r17
     758:	0f 91       	pop	r16
     75a:	ff 90       	pop	r15
     75c:	ef 90       	pop	r14
     75e:	df 90       	pop	r13
     760:	cf 90       	pop	r12
     762:	08 95       	ret

00000764 <USI_TWI_Start_Read_Write>:
 
 Success or error code is returned. Error codes are defined in 
 USI_TWI_Master.h
---------------------------------------------------------------*/
unsigned char USI_TWI_Start_Read_Write( unsigned char *msg, unsigned char msgSize)
{
     764:	10 92 da 01 	sts	0x01DA, r1
    
	USI_TWI_state.errorState = 0;				// Clears all mode bits also
  
	return (USI_TWI_Start_Transceiver_With_Data( msg, msgSize));
     768:	0e 94 3b 03 	call	0x676	; 0x676 <USI_TWI_Start_Transceiver_With_Data>
	
}
     76c:	08 95       	ret

0000076e <USI_TWI_Start_Random_Read>:
 
 Success or error code is returned. Error codes are defined in 
 USI_TWI_Master.h
---------------------------------------------------------------*/
unsigned char USI_TWI_Start_Random_Read( unsigned char *msg, unsigned char msgSize)
{
     76e:	fc 01       	movw	r30, r24
  *(msg) &= ~(TRUE<<TWI_READ_BIT);		// clear the read bit if it's set
     770:	80 81       	ld	r24, Z
     772:	8e 7f       	andi	r24, 0xFE	; 254
     774:	80 83       	st	Z, r24
  USI_TWI_state.errorState = 0;
  USI_TWI_state.memReadMode = TRUE;
     776:	84 e0       	ldi	r24, 0x04	; 4
     778:	80 93 da 01 	sts	0x01DA, r24
  
  return (USI_TWI_Start_Transceiver_With_Data( msg, msgSize));
     77c:	cf 01       	movw	r24, r30
     77e:	0e 94 3b 03 	call	0x676	; 0x676 <USI_TWI_Start_Transceiver_With_Data>
}
     782:	08 95       	ret

00000784 <LCD_Init>:
*   Purpose :       Initialize LCD_displayData buffer.
*                   Set up the LCD (timing, contrast, etc.)
*
*****************************************************************************/
void LCD_Init (void)
{
     784:	ec ed       	ldi	r30, 0xDC	; 220
     786:	f1 e0       	ldi	r31, 0x01	; 1
    if (show)
        show = 0xFF;

    // Set/clear all bits in all LCD registers
    for (i=0; i < LCD_REGISTER_COUNT; i++)
        *(LCD_Data + i) = show;
     788:	11 92       	st	Z+, r1

    if (show)
        show = 0xFF;

    // Set/clear all bits in all LCD registers
    for (i=0; i < LCD_REGISTER_COUNT; i++)
     78a:	81 e0       	ldi	r24, 0x01	; 1
     78c:	e0 3f       	cpi	r30, 0xF0	; 240
     78e:	f8 07       	cpc	r31, r24
     790:	d9 f7       	brne	.-10     	; 0x788 <LCD_Init+0x4>
*****************************************************************************/
void LCD_Init (void)
{
    LCD_AllSegments(FALSE);                     // Clear segment buffer.

    LCD_CONTRAST_LEVEL(LCD_INITIAL_CONTRAST);    //Set the LCD contrast level
     792:	8f e0       	ldi	r24, 0x0F	; 15
     794:	80 93 e7 00 	sts	0x00E7, r24

    // Select asynchronous clock source, enable all COM pins and enable all
    // segment pins.
    LCDCRB = (1<<LCDCS) | (3<<LCDMUX0) | (7<<LCDPM0);
     798:	87 eb       	ldi	r24, 0xB7	; 183
     79a:	80 93 e5 00 	sts	0x00E5, r24

    // Set LCD prescaler to give a framerate of 32,0 Hz
    LCDFRR = (0<<LCDPS0) | (7<<LCDCD0);    
     79e:	87 e0       	ldi	r24, 0x07	; 7
     7a0:	80 93 e6 00 	sts	0x00E6, r24

    LCDCRA = (1<<LCDEN) | (1<<LCDAB);           // Enable LCD and set low power waveform
     7a4:	80 ec       	ldi	r24, 0xC0	; 192
     7a6:	80 93 e4 00 	sts	0x00E4, r24

    //Enable LCD start of frame interrupt
    LCDCRA |= (1<<LCDIE);
     7aa:	80 91 e4 00 	lds	r24, 0x00E4
     7ae:	88 60       	ori	r24, 0x08	; 8
     7b0:	80 93 e4 00 	sts	0x00E4, r24

    gLCD_Update_Required = FALSE;
     7b4:	10 92 d5 01 	sts	0x01D5, r1


}
     7b8:	08 95       	ret

000007ba <LCD_WriteDigit>:
*   Purpose :       Stores LCD control data in the LCD_displayData buffer.
*                   (The LCD_displayData is latched in the LCD_SOF interrupt.)
*
*****************************************************************************/
void LCD_WriteDigit(char c, char digit)
{
     7ba:	98 2f       	mov	r25, r24
    char mask, nibble;
    char *ptr;
    char i;


    if (digit > 5)                              // Skip if digit is illegal
     7bc:	66 30       	cpi	r22, 0x06	; 6
     7be:	b0 f5       	brcc	.+108    	; 0x82c <LCD_WriteDigit+0x72>
        return;

    //Lookup character table for segmet data
    if ((c >= '*') && (c <= 'z'))
     7c0:	8a 52       	subi	r24, 0x2A	; 42
     7c2:	81 35       	cpi	r24, 0x51	; 81
     7c4:	18 f0       	brcs	.+6      	; 0x7cc <LCD_WriteDigit+0x12>
     7c6:	40 e0       	ldi	r20, 0x00	; 0
     7c8:	50 e0       	ldi	r21, 0x00	; 0
     7ca:	0c c0       	rjmp	.+24     	; 0x7e4 <LCD_WriteDigit+0x2a>
    {
        // c is a letter
        if (c >= 'a')                           // Convert to upper case
     7cc:	91 36       	cpi	r25, 0x61	; 97
     7ce:	08 f0       	brcs	.+2      	; 0x7d2 <LCD_WriteDigit+0x18>
            c &= ~0x20;                         // if necessarry
     7d0:	9f 7d       	andi	r25, 0xDF	; 223

        c -= '*';

		//mt seg = LCD_character_table[c];
		seg = (unsigned int) pgm_read_word(&LCD_character_table[(uint8_t)c]); 
     7d2:	9a 52       	subi	r25, 0x2A	; 42
     7d4:	e9 2f       	mov	r30, r25
     7d6:	f0 e0       	ldi	r31, 0x00	; 0
     7d8:	ee 0f       	add	r30, r30
     7da:	ff 1f       	adc	r31, r31
     7dc:	e4 5a       	subi	r30, 0xA4	; 164
     7de:	ff 4f       	sbci	r31, 0xFF	; 255
     7e0:	45 91       	lpm	r20, Z+
     7e2:	54 91       	lpm	r21, Z+
	}

    // Adjust mask according to LCD segment mapping
    if (digit & 0x01)
     7e4:	86 2f       	mov	r24, r22
     7e6:	90 e0       	ldi	r25, 0x00	; 0
     7e8:	dc 01       	movw	r26, r24
     7ea:	a1 70       	andi	r26, 0x01	; 1
     7ec:	b0 70       	andi	r27, 0x00	; 0
     7ee:	60 fd       	sbrc	r22, 0
     7f0:	02 c0       	rjmp	.+4      	; 0x7f6 <LCD_WriteDigit+0x3c>
     7f2:	90 ef       	ldi	r25, 0xF0	; 240
     7f4:	01 c0       	rjmp	.+2      	; 0x7f8 <LCD_WriteDigit+0x3e>
     7f6:	9f e0       	ldi	r25, 0x0F	; 15
        mask = 0x0F;                // Digit 1, 3, 5
    else
        mask = 0xF0;                // Digit 0, 2, 4

    ptr = LCD_Data + (digit >> 1);  // digit = {0,0,1,1,2,2}
     7f8:	66 95       	lsr	r22
     7fa:	e6 2f       	mov	r30, r22
     7fc:	f0 e0       	ldi	r31, 0x00	; 0
     7fe:	e4 52       	subi	r30, 0x24	; 36
     800:	fe 4f       	sbci	r31, 0xFE	; 254
     802:	30 e0       	ldi	r19, 0x00	; 0

    for (i = 0; i < 4; i++)
    {
        nibble = seg & 0x000F;
     804:	24 2f       	mov	r18, r20
     806:	2f 70       	andi	r18, 0x0F	; 15
        seg >>= 4;
     808:	84 e0       	ldi	r24, 0x04	; 4
     80a:	56 95       	lsr	r21
     80c:	47 95       	ror	r20
     80e:	8a 95       	dec	r24
     810:	e1 f7       	brne	.-8      	; 0x80a <LCD_WriteDigit+0x50>
        if (digit & 0x01)
     812:	10 97       	sbiw	r26, 0x00	; 0
     814:	11 f0       	breq	.+4      	; 0x81a <LCD_WriteDigit+0x60>
            nibble <<= 4;
     816:	22 95       	swap	r18
     818:	20 7f       	andi	r18, 0xF0	; 240
        *ptr = (*ptr & mask) | nibble;
     81a:	80 81       	ld	r24, Z
     81c:	89 23       	and	r24, r25
     81e:	28 2b       	or	r18, r24
     820:	20 83       	st	Z, r18
    else
        mask = 0xF0;                // Digit 0, 2, 4

    ptr = LCD_Data + (digit >> 1);  // digit = {0,0,1,1,2,2}

    for (i = 0; i < 4; i++)
     822:	3f 5f       	subi	r19, 0xFF	; 255
     824:	34 30       	cpi	r19, 0x04	; 4
     826:	11 f0       	breq	.+4      	; 0x82c <LCD_WriteDigit+0x72>
        nibble = seg & 0x000F;
        seg >>= 4;
        if (digit & 0x01)
            nibble <<= 4;
        *ptr = (*ptr & mask) | nibble;
        ptr += 5;
     828:	35 96       	adiw	r30, 0x05	; 5
     82a:	ec cf       	rjmp	.-40     	; 0x804 <LCD_WriteDigit+0x4a>
     82c:	08 95       	ret

0000082e <LCD_AllSegments>:
*
*   Purpose :       shows or hide all all LCD segments on the LCD
*
*****************************************************************************/
void LCD_AllSegments(char show)
{
     82e:	81 11       	cpse	r24, r1
     830:	8f ef       	ldi	r24, 0xFF	; 255
     832:	ec ed       	ldi	r30, 0xDC	; 220
     834:	f1 e0       	ldi	r31, 0x01	; 1
    if (show)
        show = 0xFF;

    // Set/clear all bits in all LCD registers
    for (i=0; i < LCD_REGISTER_COUNT; i++)
        *(LCD_Data + i) = show;
     836:	81 93       	st	Z+, r24

    if (show)
        show = 0xFF;

    // Set/clear all bits in all LCD registers
    for (i=0; i < LCD_REGISTER_COUNT; i++)
     838:	91 e0       	ldi	r25, 0x01	; 1
     83a:	e0 3f       	cpi	r30, 0xF0	; 240
     83c:	f9 07       	cpc	r31, r25
     83e:	d9 f7       	brne	.-10     	; 0x836 <LCD_AllSegments+0x8>
        *(LCD_Data + i) = show;
}
     840:	08 95       	ret

00000842 <__vector_22>:
*   Purpose: Latch the LCD_displayData and Set LCD_status.updateComplete
*
*****************************************************************************/

ISR(SIG_LCD)
{
     842:	1f 92       	push	r1
     844:	0f 92       	push	r0
     846:	0f b6       	in	r0, 0x3f	; 63
     848:	0f 92       	push	r0
     84a:	11 24       	eor	r1, r1
     84c:	ef 92       	push	r14
     84e:	ff 92       	push	r15
     850:	0f 93       	push	r16
     852:	1f 93       	push	r17
     854:	2f 93       	push	r18
     856:	3f 93       	push	r19
     858:	4f 93       	push	r20
     85a:	5f 93       	push	r21
     85c:	6f 93       	push	r22
     85e:	7f 93       	push	r23
     860:	8f 93       	push	r24
     862:	9f 93       	push	r25
     864:	af 93       	push	r26
     866:	bf 93       	push	r27
     868:	cf 93       	push	r28
     86a:	df 93       	push	r29
     86c:	ef 93       	push	r30
     86e:	ff 93       	push	r31
        auto_joystick_count = 0;
*/

/**************** Auto press joystick for the main.c, END ***************/    

    LCD_timer--;                    // Decreased every LCD frame
     870:	00 91 a9 01 	lds	r16, 0x01A9
     874:	01 50       	subi	r16, 0x01	; 1
     876:	00 93 a9 01 	sts	0x01A9, r16

    if (gScrollMode)
     87a:	80 91 db 01 	lds	r24, 0x01DB
     87e:	88 23       	and	r24, r24
     880:	71 f0       	breq	.+28     	; 0x89e <__vector_22+0x5c>
    {
        // If we are in scroll mode, and the timer has expired,
        // we will update the LCD
        if (LCD_timer == 0)
     882:	00 23       	and	r16, r16
     884:	71 f4       	brne	.+28     	; 0x8a2 <__vector_22+0x60>
        {
            if (gLCD_Start_Scroll_Timer == 0)
     886:	80 91 d6 01 	lds	r24, 0x01D6
     88a:	88 23       	and	r24, r24
     88c:	21 f4       	brne	.+8      	; 0x896 <__vector_22+0x54>
            {
                gLCD_Update_Required = TRUE;
     88e:	81 e0       	ldi	r24, 0x01	; 1
     890:	80 93 d5 01 	sts	0x01D5, r24
     894:	06 c0       	rjmp	.+12     	; 0x8a2 <__vector_22+0x60>
            }
            else
                gLCD_Start_Scroll_Timer--;
     896:	81 50       	subi	r24, 0x01	; 1
     898:	80 93 d6 01 	sts	0x01D6, r24
     89c:	02 c0       	rjmp	.+4      	; 0x8a2 <__vector_22+0x60>
    }
    else    
    {   // if not scrolling,
        // disble LCD start of frame interrupt
//        cbi(LCDCRA, LCDIE);   //DEBUG
        gScroll = 0;
     89e:	10 92 09 02 	sts	0x0209, r1
    }


    EOL = FALSE;
    if (gLCD_Update_Required == TRUE)
     8a2:	80 91 d5 01 	lds	r24, 0x01D5
     8a6:	81 30       	cpi	r24, 0x01	; 1
     8a8:	09 f0       	breq	.+2      	; 0x8ac <__vector_22+0x6a>
     8aa:	53 c0       	rjmp	.+166    	; 0x952 <__vector_22+0x110>
    {
        // Duty cycle of flashing characters
        if (gFlashTimer < (LCD_FLASH_SEED >> 1))
     8ac:	e0 90 d7 01 	lds	r14, 0x01D7
     8b0:	ff 24       	eor	r15, r15
     8b2:	10 e0       	ldi	r17, 0x00	; 0
     8b4:	c0 e0       	ldi	r28, 0x00	; 0
     8b6:	d0 e0       	ldi	r29, 0x00	; 0
     8b8:	6c 2f       	mov	r22, r28
            flash = 1;

        // Repeat for the six LCD characters
        for (i = 0; i < 6; i++)
        {
            if ((gScroll+i) >= 0 && (!EOL))
     8ba:	80 91 09 02 	lds	r24, 0x0209
     8be:	99 27       	eor	r25, r25
     8c0:	87 fd       	sbrc	r24, 7
     8c2:	90 95       	com	r25
     8c4:	8c 0f       	add	r24, r28
     8c6:	9d 1f       	adc	r25, r29
     8c8:	97 fd       	sbrc	r25, 7
     8ca:	16 c0       	rjmp	.+44     	; 0x8f8 <__vector_22+0xb6>
     8cc:	11 23       	and	r17, r17
     8ce:	a1 f4       	brne	.+40     	; 0x8f8 <__vector_22+0xb6>
            {
                // We have some visible characters
                c = gTextBuffer[i + gScroll];
     8d0:	80 91 09 02 	lds	r24, 0x0209
     8d4:	99 27       	eor	r25, r25
     8d6:	87 fd       	sbrc	r24, 7
     8d8:	90 95       	com	r25
     8da:	fe 01       	movw	r30, r28
     8dc:	e0 51       	subi	r30, 0x10	; 16
     8de:	fe 4f       	sbci	r31, 0xFE	; 254
     8e0:	e8 0f       	add	r30, r24
     8e2:	f9 1f       	adc	r31, r25
     8e4:	80 81       	ld	r24, Z
                c_flash = c & 0x80 ? 1 : 0;
     8e6:	f8 2e       	mov	r15, r24
     8e8:	ff 1c       	adc	r15, r15
     8ea:	ff 24       	eor	r15, r15
     8ec:	ff 1c       	adc	r15, r15
                c = c & 0x7F;
     8ee:	8f 77       	andi	r24, 0x7F	; 127

                if (c == '\0')
     8f0:	21 f4       	brne	.+8      	; 0x8fa <__vector_22+0xb8>
     8f2:	1c 2f       	mov	r17, r28
     8f4:	1f 5f       	subi	r17, 0xFF	; 255
     8f6:	01 c0       	rjmp	.+2      	; 0x8fa <__vector_22+0xb8>
     8f8:	80 e2       	ldi	r24, 0x20	; 32
            else
                c = ' ';

            // Check if this character is flashing

            if (c_flash && flash)
     8fa:	ff 20       	and	r15, r15
     8fc:	21 f0       	breq	.+8      	; 0x906 <__vector_22+0xc4>
     8fe:	94 e0       	ldi	r25, 0x04	; 4
     900:	9e 15       	cp	r25, r14
     902:	08 f4       	brcc	.+2      	; 0x906 <__vector_22+0xc4>
                LCD_WriteDigit(' ', i);
     904:	80 e2       	ldi	r24, 0x20	; 32
            else
                LCD_WriteDigit(c, i);
     906:	0e 94 dd 03 	call	0x7ba	; 0x7ba <LCD_WriteDigit>
     90a:	21 96       	adiw	r28, 0x01	; 1
            flash = 0;
        else
            flash = 1;

        // Repeat for the six LCD characters
        for (i = 0; i < 6; i++)
     90c:	c6 30       	cpi	r28, 0x06	; 6
     90e:	d1 05       	cpc	r29, r1
     910:	99 f6       	brne	.-90     	; 0x8b8 <__vector_22+0x76>
     912:	ac ee       	ldi	r26, 0xEC	; 236
     914:	b0 e0       	ldi	r27, 0x00	; 0
                LCD_WriteDigit(c, i);
        }

        // Copy the segment buffer to the real segments
        for (i = 0; i < LCD_REGISTER_COUNT; i++)
            *(pLCDREG + i) = *(LCD_Data+i);
     916:	fd 01       	movw	r30, r26
     918:	e0 51       	subi	r30, 0x10	; 16
     91a:	ff 4f       	sbci	r31, 0xFF	; 255
     91c:	80 81       	ld	r24, Z
     91e:	8d 93       	st	X+, r24
            else
                LCD_WriteDigit(c, i);
        }

        // Copy the segment buffer to the real segments
        for (i = 0; i < LCD_REGISTER_COUNT; i++)
     920:	81 e0       	ldi	r24, 0x01	; 1
     922:	a0 30       	cpi	r26, 0x00	; 0
     924:	b8 07       	cpc	r27, r24
     926:	b9 f7       	brne	.-18     	; 0x916 <__vector_22+0xd4>
            *(pLCDREG + i) = *(LCD_Data+i);

        // Handle colon
        if (gColon)
     928:	80 91 d8 01 	lds	r24, 0x01D8
     92c:	88 23       	and	r24, r24
     92e:	21 f0       	breq	.+8      	; 0x938 <__vector_22+0xf6>
            *(pLCDREG + 8) = 0x01;
     930:	81 e0       	ldi	r24, 0x01	; 1
     932:	80 93 f4 00 	sts	0x00F4, r24
     936:	02 c0       	rjmp	.+4      	; 0x93c <__vector_22+0xfa>
        else
            *(pLCDREG + 8) = 0x00;
     938:	10 92 f4 00 	sts	0x00F4, r1

        // If the text scrolled off the display,
        // we have to start over again.
        if (EOL == 1)
     93c:	11 30       	cpi	r17, 0x01	; 1
     93e:	11 f4       	brne	.+4      	; 0x944 <__vector_22+0x102>
            gScroll = -6;
     940:	8a ef       	ldi	r24, 0xFA	; 250
     942:	03 c0       	rjmp	.+6      	; 0x94a <__vector_22+0x108>
        else
            gScroll++;
     944:	80 91 09 02 	lds	r24, 0x0209
     948:	8f 5f       	subi	r24, 0xFF	; 255
     94a:	80 93 09 02 	sts	0x0209, r24

        // No need to update anymore
        gLCD_Update_Required = FALSE;
     94e:	10 92 d5 01 	sts	0x01D5, r1
    }


    // LCD_timer is used when scrolling text
    if (LCD_timer == 0)
     952:	00 23       	and	r16, r16
     954:	19 f4       	brne	.+6      	; 0x95c <__vector_22+0x11a>
    {
/*        if ((gScroll <= 0) || EOL)
            LCD_timer = LCD_TIMER_SEED/2;
        else*/
            LCD_timer = LCD_TIMER_SEED;
     956:	83 e0       	ldi	r24, 0x03	; 3
     958:	80 93 a9 01 	sts	0x01A9, r24
    }

    // gFlashTimer is used when flashing characters
    if (gFlashTimer == LCD_FLASH_SEED)
     95c:	80 91 d7 01 	lds	r24, 0x01D7
     960:	8a 30       	cpi	r24, 0x0A	; 10
     962:	19 f4       	brne	.+6      	; 0x96a <__vector_22+0x128>
        gFlashTimer= 0;
     964:	10 92 d7 01 	sts	0x01D7, r1
     968:	03 c0       	rjmp	.+6      	; 0x970 <__vector_22+0x12e>
    else
        gFlashTimer++;
     96a:	8f 5f       	subi	r24, 0xFF	; 255
     96c:	80 93 d7 01 	sts	0x01D7, r24

}
     970:	ff 91       	pop	r31
     972:	ef 91       	pop	r30
     974:	df 91       	pop	r29
     976:	cf 91       	pop	r28
     978:	bf 91       	pop	r27
     97a:	af 91       	pop	r26
     97c:	9f 91       	pop	r25
     97e:	8f 91       	pop	r24
     980:	7f 91       	pop	r23
     982:	6f 91       	pop	r22
     984:	5f 91       	pop	r21
     986:	4f 91       	pop	r20
     988:	3f 91       	pop	r19
     98a:	2f 91       	pop	r18
     98c:	1f 91       	pop	r17
     98e:	0f 91       	pop	r16
     990:	ff 90       	pop	r15
     992:	ef 90       	pop	r14
     994:	0f 90       	pop	r0
     996:	0f be       	out	0x3f, r0	; 63
     998:	0f 90       	pop	r0
     99a:	1f 90       	pop	r1
     99c:	18 95       	reti

0000099e <LCD_puts_f>:
*
*****************************************************************************/

// mt void LCD_puts_f(char __flash *pFlashStr, char scrollmode)
void LCD_puts_f(const char *pFlashStr, char scrollmode)
{
     99e:	38 2f       	mov	r19, r24
     9a0:	29 2f       	mov	r18, r25
    // char i;
	uint8_t i;

    while (gLCD_Update_Required);      // Wait for access to buffer
     9a2:	80 91 d5 01 	lds	r24, 0x01D5
     9a6:	88 23       	and	r24, r24
     9a8:	e1 f7       	brne	.-8      	; 0x9a2 <LCD_puts_f+0x4>
     9aa:	a0 ef       	ldi	r26, 0xF0	; 240
     9ac:	b1 e0       	ldi	r27, 0x01	; 1
     9ae:	83 2f       	mov	r24, r19
     9b0:	92 2f       	mov	r25, r18
     9b2:	fc 01       	movw	r30, r24
     9b4:	01 c0       	rjmp	.+2      	; 0x9b8 <LCD_puts_f+0x1a>

    // mt: for (i = 0; pFlashStr[i] && i < TEXTBUFFER_SIZE; i++)
	for (i = 0; pgm_read_byte(&pFlashStr[i]) && i < TEXTBUFFER_SIZE; i++)
    {
        // mt: gTextBuffer[i] = pFlashStr[i];
		gTextBuffer[i] = pgm_read_byte(&pFlashStr[i]);
     9b6:	2d 93       	st	X+, r18
     9b8:	8e 2f       	mov	r24, r30
     9ba:	83 1b       	sub	r24, r19
	uint8_t i;

    while (gLCD_Update_Required);      // Wait for access to buffer

    // mt: for (i = 0; pFlashStr[i] && i < TEXTBUFFER_SIZE; i++)
	for (i = 0; pgm_read_byte(&pFlashStr[i]) && i < TEXTBUFFER_SIZE; i++)
     9bc:	24 91       	lpm	r18, Z+
     9be:	22 23       	and	r18, r18
     9c0:	29 f0       	breq	.+10     	; 0x9cc <LCD_puts_f+0x2e>
     9c2:	31 96       	adiw	r30, 0x01	; 1
     9c4:	92 e0       	ldi	r25, 0x02	; 2
     9c6:	a9 30       	cpi	r26, 0x09	; 9
     9c8:	b9 07       	cpc	r27, r25
     9ca:	a9 f7       	brne	.-22     	; 0x9b6 <LCD_puts_f+0x18>
		gTextBuffer[i] = pgm_read_byte(&pFlashStr[i]);
    }

	// Set the null character in the string and scroll mode
	// based on length of the string
	setPutsString( i );
     9cc:	90 e0       	ldi	r25, 0x00	; 0
*                   functions
*
*****************************************************************************/
static void setPutsString( int index )
{
	gTextBuffer[index] = '\0';
     9ce:	fc 01       	movw	r30, r24
     9d0:	e0 51       	subi	r30, 0x10	; 16
     9d2:	fe 4f       	sbci	r31, 0xFE	; 254
     9d4:	10 82       	st	Z, r1

    if (index > 6)
     9d6:	07 97       	sbiw	r24, 0x07	; 7
     9d8:	4c f0       	brlt	.+18     	; 0x9ec <LCD_puts_f+0x4e>
    {
        gScrollMode = 1;        // Scroll if text is longer than display size
     9da:	81 e0       	ldi	r24, 0x01	; 1
     9dc:	80 93 db 01 	sts	0x01DB, r24
        gScroll = 0;
     9e0:	10 92 09 02 	sts	0x0209, r1
        gLCD_Start_Scroll_Timer = 3;    //Start-up delay before scrolling the text
     9e4:	83 e0       	ldi	r24, 0x03	; 3
     9e6:	80 93 d6 01 	sts	0x01D6, r24
     9ea:	04 c0       	rjmp	.+8      	; 0x9f4 <LCD_puts_f+0x56>
    }
    else
    {
        gScrollMode = 0;        
     9ec:	10 92 db 01 	sts	0x01DB, r1
        gScroll = 0;
     9f0:	10 92 09 02 	sts	0x0209, r1
    }

    gLCD_Update_Required = 1;
     9f4:	81 e0       	ldi	r24, 0x01	; 1
     9f6:	80 93 d5 01 	sts	0x01D5, r24
        gScroll = 0;
    }

    gLCD_Update_Required = 1;
*/
}
     9fa:	08 95       	ret

000009fc <LCD_puts>:
*
*	Purpose :		Writes a string to the LCD
*
*****************************************************************************/
void LCD_puts(char *pStr, char scrollmode)
{
     9fc:	48 2f       	mov	r20, r24
     9fe:	29 2f       	mov	r18, r25
	uint8_t i; // char i;
	
	while (gLCD_Update_Required);      // Wait for access to buffer
     a00:	80 91 d5 01 	lds	r24, 0x01D5
     a04:	88 23       	and	r24, r24
     a06:	e1 f7       	brne	.-8      	; 0xa00 <LCD_puts+0x4>
     a08:	a0 ef       	ldi	r26, 0xF0	; 240
     a0a:	b1 e0       	ldi	r27, 0x01	; 1
     a0c:	84 2f       	mov	r24, r20
     a0e:	92 2f       	mov	r25, r18
     a10:	9c 01       	movw	r18, r24
     a12:	f9 01       	movw	r30, r18
     a14:	01 c0       	rjmp	.+2      	; 0xa18 <LCD_puts+0x1c>

    for (i = 0; pStr[i] && i < TEXTBUFFER_SIZE; i++)
    {
        gTextBuffer[i] = pStr[i];
     a16:	2d 93       	st	X+, r18
     a18:	8e 2f       	mov	r24, r30
     a1a:	84 1b       	sub	r24, r20
{
	uint8_t i; // char i;
	
	while (gLCD_Update_Required);      // Wait for access to buffer

    for (i = 0; pStr[i] && i < TEXTBUFFER_SIZE; i++)
     a1c:	20 81       	ld	r18, Z
     a1e:	22 23       	and	r18, r18
     a20:	29 f0       	breq	.+10     	; 0xa2c <LCD_puts+0x30>
     a22:	31 96       	adiw	r30, 0x01	; 1
     a24:	92 e0       	ldi	r25, 0x02	; 2
     a26:	a9 30       	cpi	r26, 0x09	; 9
     a28:	b9 07       	cpc	r27, r25
     a2a:	a9 f7       	brne	.-22     	; 0xa16 <LCD_puts+0x1a>
        gTextBuffer[i] = pStr[i];
    }

	// Set the null character in the string and scroll mode
	// based on length of the string
	setPutsString( i );
     a2c:	90 e0       	ldi	r25, 0x00	; 0
*                   functions
*
*****************************************************************************/
static void setPutsString( int index )
{
	gTextBuffer[index] = '\0';
     a2e:	fc 01       	movw	r30, r24
     a30:	e0 51       	subi	r30, 0x10	; 16
     a32:	fe 4f       	sbci	r31, 0xFE	; 254
     a34:	10 82       	st	Z, r1

    if (index > 6)
     a36:	07 97       	sbiw	r24, 0x07	; 7
     a38:	4c f0       	brlt	.+18     	; 0xa4c <LCD_puts+0x50>
    {
        gScrollMode = 1;        // Scroll if text is longer than display size
     a3a:	81 e0       	ldi	r24, 0x01	; 1
     a3c:	80 93 db 01 	sts	0x01DB, r24
        gScroll = 0;
     a40:	10 92 09 02 	sts	0x0209, r1
        gLCD_Start_Scroll_Timer = 3;    //Start-up delay before scrolling the text
     a44:	83 e0       	ldi	r24, 0x03	; 3
     a46:	80 93 d6 01 	sts	0x01D6, r24
     a4a:	04 c0       	rjmp	.+8      	; 0xa54 <LCD_puts+0x58>
    }
    else
    {
        gScrollMode = 0;        
     a4c:	10 92 db 01 	sts	0x01DB, r1
        gScroll = 0;
     a50:	10 92 09 02 	sts	0x0209, r1
    }

    gLCD_Update_Required = 1;
     a54:	81 e0       	ldi	r24, 0x01	; 1
     a56:	80 93 d5 01 	sts	0x01D5, r24
        gScroll = 0;
    }

    gLCD_Update_Required = 1;
*/
}
     a5a:	08 95       	ret

00000a5c <LCD_putc>:
*
*****************************************************************************/
// mt void LCD_putc(char digit, char character)
// mt void LCD_putc(char digit, char character)
void LCD_putc(uint8_t digit, char character)
{
     a5c:	89 31       	cpi	r24, 0x19	; 25
     a5e:	28 f4       	brcc	.+10     	; 0xa6a <LCD_putc+0xe>
    if (digit < TEXTBUFFER_SIZE)
        gTextBuffer[digit] = character;
     a60:	e8 2f       	mov	r30, r24
     a62:	f0 e0       	ldi	r31, 0x00	; 0
     a64:	e0 51       	subi	r30, 0x10	; 16
     a66:	fe 4f       	sbci	r31, 0xFE	; 254
     a68:	60 83       	st	Z, r22
     a6a:	08 95       	ret

00000a6c <LCD_Clear>:
*
*	Purpose :		Clear the LCD
*
*****************************************************************************/
void LCD_Clear(void)
{
     a6c:	e0 ef       	ldi	r30, 0xF0	; 240
     a6e:	f1 e0       	ldi	r31, 0x01	; 1
    uint8_t i; // char i;
	   
    for (i=0; i<TEXTBUFFER_SIZE; i++)
        gTextBuffer[i] = '\0'; // JP changed from ' ' to stop LCD_puts_f buffer overrun
     a70:	11 92       	st	Z+, r1
*****************************************************************************/
void LCD_Clear(void)
{
    uint8_t i; // char i;
	   
    for (i=0; i<TEXTBUFFER_SIZE; i++)
     a72:	82 e0       	ldi	r24, 0x02	; 2
     a74:	e9 30       	cpi	r30, 0x09	; 9
     a76:	f8 07       	cpc	r31, r24
     a78:	d9 f7       	brne	.-10     	; 0xa70 <LCD_Clear+0x4>
        gTextBuffer[i] = '\0'; // JP changed from ' ' to stop LCD_puts_f buffer overrun
}
     a7a:	08 95       	ret

00000a7c <LCD_Colon>:
*
*	Purpose :		Enable/disable colons on the LCD
*
*****************************************************************************/
void LCD_Colon(char show)
{
     a7c:	80 93 d8 01 	sts	0x01D8, r24
    gColon = show;
}
     a80:	08 95       	ret

00000a82 <LCD_UpdateRequired>:
*
*	Purpose :		Tells the LCD that there is new data to be presented
*
*****************************************************************************/
void LCD_UpdateRequired(char update, char scrollmode)
{
     a82:	98 2f       	mov	r25, r24

    while (gLCD_Update_Required);
     a84:	80 91 d5 01 	lds	r24, 0x01D5
     a88:	88 23       	and	r24, r24
     a8a:	e1 f7       	brne	.-8      	; 0xa84 <LCD_UpdateRequired+0x2>
    
    gScrollMode = scrollmode;
     a8c:	60 93 db 01 	sts	0x01DB, r22
    gScroll = 0;
     a90:	10 92 09 02 	sts	0x0209, r1

    gLCD_Update_Required = update;
     a94:	90 93 d5 01 	sts	0x01D5, r25
}
     a98:	08 95       	ret

00000a9a <LCD_FlashReset>:
*
*	Purpose :		This function resets the blinking cycle of a flashing digit
*
*****************************************************************************/
void LCD_FlashReset(void)
{
     a9a:	10 92 d7 01 	sts	0x01D7, r1
    gFlashTimer = 0;
}
     a9e:	08 95       	ret

00000aa0 <SetContrast>:
*****************************************************************************/



void SetContrast(char input)
{
     aa0:	98 2f       	mov	r25, r24
     aa2:	e0 ef       	ldi	r30, 0xF0	; 240
     aa4:	f1 e0       	ldi	r31, 0x01	; 1
void LCD_Clear(void)
{
    uint8_t i; // char i;
	   
    for (i=0; i<TEXTBUFFER_SIZE; i++)
        gTextBuffer[i] = '\0'; // JP changed from ' ' to stop LCD_puts_f buffer overrun
     aa6:	11 92       	st	Z+, r1
*****************************************************************************/
void LCD_Clear(void)
{
    uint8_t i; // char i;
	   
    for (i=0; i<TEXTBUFFER_SIZE; i++)
     aa8:	82 e0       	ldi	r24, 0x02	; 2
     aaa:	e9 30       	cpi	r30, 0x09	; 9
     aac:	f8 07       	cpc	r31, r24
     aae:	d9 f7       	brne	.-10     	; 0xaa6 <SetContrast+0x6>
// mt void LCD_putc(char digit, char character)
// mt void LCD_putc(char digit, char character)
void LCD_putc(uint8_t digit, char character)
{
    if (digit < TEXTBUFFER_SIZE)
        gTextBuffer[digit] = character;
     ab0:	81 e4       	ldi	r24, 0x41	; 65
     ab2:	80 93 f0 01 	sts	0x01F0, r24
*
*****************************************************************************/
void LCD_UpdateRequired(char update, char scrollmode)
{

    while (gLCD_Update_Required);
     ab6:	82 e4       	ldi	r24, 0x42	; 66
     ab8:	80 93 f1 01 	sts	0x01F1, r24
     abc:	83 e4       	ldi	r24, 0x43	; 67
     abe:	80 93 f2 01 	sts	0x01F2, r24
     ac2:	84 e4       	ldi	r24, 0x44	; 68
     ac4:	80 93 f3 01 	sts	0x01F3, r24
     ac8:	85 e4       	ldi	r24, 0x45	; 69
     aca:	80 93 f4 01 	sts	0x01F4, r24
     ace:	86 e4       	ldi	r24, 0x46	; 70
     ad0:	80 93 f5 01 	sts	0x01F5, r24
     ad4:	80 91 d5 01 	lds	r24, 0x01D5
     ad8:	88 23       	and	r24, r24
     ada:	e1 f7       	brne	.-8      	; 0xad4 <SetContrast+0x34>
    
    gScrollMode = scrollmode;
     adc:	10 92 db 01 	sts	0x01DB, r1
    gScroll = 0;
     ae0:	10 92 09 02 	sts	0x0209, r1

    gLCD_Update_Required = update;
     ae4:	81 e0       	ldi	r24, 0x01	; 1
     ae6:	80 93 d5 01 	sts	0x01D5, r24
    LCD_putc(4, 'E');
    LCD_putc(5, 'F');

    LCD_UpdateRequired(TRUE, 0);

    LCD_CONTRAST_LEVEL(input);
     aea:	9f 70       	andi	r25, 0x0F	; 15
     aec:	90 93 e7 00 	sts	0x00E7, r25

}
     af0:	08 95       	ret

00000af2 <SRF_init>:
uint8_t i2cMessageBuf[SRF_I2C_MESSAGE_BUFFER_MAX_SIZE];
//uint16_t *range;


void SRF_init( int numDevices )
{
     af2:	80 93 d0 01 	sts	0x01D0, r24
#endif
		sendFString( memErrorMsg );
		numSonar = 0;
	}
*/
}
     af6:	08 95       	ret

00000af8 <SRF_changeAddress>:
}


// ADDRESS CHANGE
void SRF_changeAddress( uint8_t oldIndex, uint8_t newIndex )
{
     af8:	df 92       	push	r13
     afa:	ef 92       	push	r14
     afc:	ff 92       	push	r15
     afe:	0f 93       	push	r16
     b00:	1f 93       	push	r17
     b02:	df 93       	push	r29
     b04:	cf 93       	push	r28
     b06:	cd b7       	in	r28, 0x3d	; 61
     b08:	de b7       	in	r29, 0x3e	; 62
     b0a:	64 97       	sbiw	r28, 0x14	; 20
     b0c:	0f b6       	in	r0, 0x3f	; 63
     b0e:	f8 94       	cli
     b10:	de bf       	out	0x3e, r29	; 62
     b12:	0f be       	out	0x3f, r0	; 63
     b14:	cd bf       	out	0x3d, r28	; 61
     b16:	d6 2e       	mov	r13, r22
	// Address change requires three specific commands sent in order
	// Followed by the new address

	oldIndex <<= 1;
     b18:	f8 2e       	mov	r15, r24
     b1a:	ff 0c       	add	r15, r15
	newIndex <<= 1;
     b1c:	dd 0c       	add	r13, r13

	char line[20];
	sprintf( line, "ChAddr %X %X\n", oldIndex, newIndex );
     b1e:	8d 2d       	mov	r24, r13
     b20:	90 e0       	ldi	r25, 0x00	; 0
     b22:	9f 93       	push	r25
     b24:	8f 93       	push	r24
     b26:	8f 2d       	mov	r24, r15
     b28:	90 e0       	ldi	r25, 0x00	; 0
     b2a:	9f 93       	push	r25
     b2c:	8f 93       	push	r24
     b2e:	8b ea       	ldi	r24, 0xAB	; 171
     b30:	91 e0       	ldi	r25, 0x01	; 1
     b32:	9f 93       	push	r25
     b34:	8f 93       	push	r24
     b36:	8e 01       	movw	r16, r28
     b38:	0f 5f       	subi	r16, 0xFF	; 255
     b3a:	1f 4f       	sbci	r17, 0xFF	; 255
     b3c:	1f 93       	push	r17
     b3e:	0f 93       	push	r16
     b40:	0e 94 95 08 	call	0x112a	; 0x112a <sprintf>
	sendString( line );
     b44:	c8 01       	movw	r24, r16
     b46:	0e 94 6c 01 	call	0x2d8	; 0x2d8 <sendString>


	// Send first byte for address change
	i2cMessageBuf[0] = SRF_BASE_ADDR + oldIndex; // Address
     b4a:	80 ee       	ldi	r24, 0xE0	; 224
     b4c:	f8 0e       	add	r15, r24
     b4e:	0a e0       	ldi	r16, 0x0A	; 10
     b50:	12 e0       	ldi	r17, 0x02	; 2
     b52:	f0 92 0a 02 	sts	0x020A, r15
	i2cMessageBuf[1] = SRF_COMMAND_REG; // Register to send command to
     b56:	10 92 0b 02 	sts	0x020B, r1
	i2cMessageBuf[2] = SRF_ADDR_CHANGE_1;
     b5a:	80 ea       	ldi	r24, 0xA0	; 160
     b5c:	80 93 0c 02 	sts	0x020C, r24
	USI_TWI_Start_Read_Write( i2cMessageBuf, 3 );
     b60:	63 e0       	ldi	r22, 0x03	; 3
     b62:	c8 01       	movw	r24, r16
     b64:	0e 94 b2 03 	call	0x764	; 0x764 <USI_TWI_Start_Read_Write>
     b68:	8d e0       	ldi	r24, 0x0D	; 13
     b6a:	e8 2e       	mov	r14, r24
     b6c:	8e 2d       	mov	r24, r14
     b6e:	8a 95       	dec	r24
     b70:	f1 f7       	brne	.-4      	; 0xb6e <SRF_changeAddress+0x76>
	_delay_us( 20 );

	// Send first byte for address change
	i2cMessageBuf[0] = SRF_BASE_ADDR + oldIndex; // Address
     b72:	f0 92 0a 02 	sts	0x020A, r15
	i2cMessageBuf[1] = SRF_COMMAND_REG; // Register to send command to
     b76:	10 92 0b 02 	sts	0x020B, r1
	i2cMessageBuf[2] = SRF_ADDR_CHANGE_2;
     b7a:	8a ea       	ldi	r24, 0xAA	; 170
     b7c:	80 93 0c 02 	sts	0x020C, r24
	USI_TWI_Start_Read_Write( i2cMessageBuf, 3 );
     b80:	63 e0       	ldi	r22, 0x03	; 3
     b82:	c8 01       	movw	r24, r16
     b84:	0e 94 b2 03 	call	0x764	; 0x764 <USI_TWI_Start_Read_Write>
     b88:	8e 2d       	mov	r24, r14
     b8a:	8a 95       	dec	r24
     b8c:	f1 f7       	brne	.-4      	; 0xb8a <SRF_changeAddress+0x92>
	_delay_us( 20 );

	// Send second byte for address change
	i2cMessageBuf[0] = SRF_BASE_ADDR + oldIndex; // Address
     b8e:	f0 92 0a 02 	sts	0x020A, r15
	i2cMessageBuf[1] = SRF_COMMAND_REG; // Register to send command to
     b92:	10 92 0b 02 	sts	0x020B, r1
	i2cMessageBuf[2] = SRF_ADDR_CHANGE_3;
     b96:	85 ea       	ldi	r24, 0xA5	; 165
     b98:	80 93 0c 02 	sts	0x020C, r24
	USI_TWI_Start_Read_Write( i2cMessageBuf, 3 );
     b9c:	63 e0       	ldi	r22, 0x03	; 3
     b9e:	c8 01       	movw	r24, r16
     ba0:	0e 94 b2 03 	call	0x764	; 0x764 <USI_TWI_Start_Read_Write>
     ba4:	8e 2d       	mov	r24, r14
     ba6:	8a 95       	dec	r24
     ba8:	f1 f7       	brne	.-4      	; 0xba6 <SRF_changeAddress+0xae>
	_delay_us( 20 );

	// Send new address
	i2cMessageBuf[0] = SRF_BASE_ADDR + oldIndex; // Address
     baa:	f0 92 0a 02 	sts	0x020A, r15
	i2cMessageBuf[1] = SRF_COMMAND_REG; // Register to send command to
     bae:	10 92 0b 02 	sts	0x020B, r1
	i2cMessageBuf[2] = SRF_BASE_ADDR + newIndex;
     bb2:	90 ee       	ldi	r25, 0xE0	; 224
     bb4:	d9 0e       	add	r13, r25
     bb6:	d0 92 0c 02 	sts	0x020C, r13
	USI_TWI_Start_Read_Write( i2cMessageBuf, 3 );
     bba:	63 e0       	ldi	r22, 0x03	; 3
     bbc:	c8 01       	movw	r24, r16
     bbe:	0e 94 b2 03 	call	0x764	; 0x764 <USI_TWI_Start_Read_Write>
     bc2:	ea 94       	dec	r14
     bc4:	f1 f7       	brne	.-4      	; 0xbc2 <SRF_changeAddress+0xca>
     bc6:	8d b7       	in	r24, 0x3d	; 61
     bc8:	9e b7       	in	r25, 0x3e	; 62
     bca:	08 96       	adiw	r24, 0x08	; 8
     bcc:	0f b6       	in	r0, 0x3f	; 63
     bce:	f8 94       	cli
     bd0:	9e bf       	out	0x3e, r25	; 62
     bd2:	0f be       	out	0x3f, r0	; 63
     bd4:	8d bf       	out	0x3d, r24	; 61
	_delay_us( 20 );
}
     bd6:	64 96       	adiw	r28, 0x14	; 20
     bd8:	0f b6       	in	r0, 0x3f	; 63
     bda:	f8 94       	cli
     bdc:	de bf       	out	0x3e, r29	; 62
     bde:	0f be       	out	0x3f, r0	; 63
     be0:	cd bf       	out	0x3d, r28	; 61
     be2:	cf 91       	pop	r28
     be4:	df 91       	pop	r29
     be6:	1f 91       	pop	r17
     be8:	0f 91       	pop	r16
     bea:	ff 90       	pop	r15
     bec:	ef 90       	pop	r14
     bee:	df 90       	pop	r13
     bf0:	08 95       	ret

00000bf2 <SRF_getVersion>:



// GET VERSION
int8_t SRF_getVersion( uint8_t deviceNum )
{
     bf2:	88 0f       	add	r24, r24
     bf4:	8f 51       	subi	r24, 0x1F	; 31
     bf6:	80 93 0a 02 	sts	0x020A, r24
	i2cMessageBuf[0] = SRF_BASE_ADDR + 1 + (deviceNum << 1); // Odd numbers for read
	i2cMessageBuf[1] = SRF_COMMAND_REG; // Register 0 contains version number
     bfa:	10 92 0b 02 	sts	0x020B, r1
	USI_TWI_Start_Read_Write( i2cMessageBuf, 2 );
     bfe:	62 e0       	ldi	r22, 0x02	; 2
     c00:	8a e0       	ldi	r24, 0x0A	; 10
     c02:	92 e0       	ldi	r25, 0x02	; 2
     c04:	0e 94 b2 03 	call	0x764	; 0x764 <USI_TWI_Start_Read_Write>
	}
	*/


	return i2cMessageBuf[1];
}
     c08:	80 91 0b 02 	lds	r24, 0x020B
     c0c:	08 95       	ret

00000c0e <SRF_isFinishedRanging>:



// FINISHED RANGING
int8_t SRF_isFinishedRanging( uint8_t index )
{
     c0e:	0e 94 f9 05 	call	0xbf2	; 0xbf2 <SRF_getVersion>
		return SRF_FALSE;
	}
	else {
		return SRF_TRUE;
	}
}
     c12:	81 e0       	ldi	r24, 0x01	; 1
     c14:	08 95       	ret

00000c16 <SRF_startRanging>:
}


// START RANGING COMMANDS
void SRF_startRanging( uint8_t deviceNum, char units )
{
     c16:	0f 93       	push	r16
     c18:	1f 93       	push	r17
     c1a:	18 2f       	mov	r17, r24
     c1c:	06 2f       	mov	r16, r22
	sprintf( "start range: %d\n", deviceNum );
     c1e:	90 e0       	ldi	r25, 0x00	; 0
     c20:	9f 93       	push	r25
     c22:	8f 93       	push	r24
     c24:	89 eb       	ldi	r24, 0xB9	; 185
     c26:	91 e0       	ldi	r25, 0x01	; 1
     c28:	9f 93       	push	r25
     c2a:	8f 93       	push	r24
     c2c:	0e 94 95 08 	call	0x112a	; 0x112a <sprintf>

	// Create the command to send over I2C
	i2cMessageBuf[0] = SRF_BASE_ADDR + (deviceNum << 1); // Address of device
     c30:	11 0f       	add	r17, r17
     c32:	10 52       	subi	r17, 0x20	; 32
     c34:	10 93 0a 02 	sts	0x020A, r17
	i2cMessageBuf[1] = SRF_COMMAND_REG; // Register zero for commands
     c38:	10 92 0b 02 	sts	0x020B, r1
	i2cMessageBuf[2] = units; // Start ranging
     c3c:	00 93 0c 02 	sts	0x020C, r16

	// Send the message
	USI_TWI_Start_Read_Write( i2cMessageBuf, 3 );
     c40:	63 e0       	ldi	r22, 0x03	; 3
     c42:	8a e0       	ldi	r24, 0x0A	; 10
     c44:	92 e0       	ldi	r25, 0x02	; 2
     c46:	0e 94 b2 03 	call	0x764	; 0x764 <USI_TWI_Start_Read_Write>
     c4a:	0f 90       	pop	r0
     c4c:	0f 90       	pop	r0
     c4e:	0f 90       	pop	r0
     c50:	0f 90       	pop	r0
}
     c52:	1f 91       	pop	r17
     c54:	0f 91       	pop	r16
     c56:	08 95       	ret

00000c58 <SRF_startAllRanging>:


void SRF_startAllRanging( char units )
{
     c58:	1f 93       	push	r17
     c5a:	cf 93       	push	r28
     c5c:	df 93       	push	r29
     c5e:	18 2f       	mov	r17, r24
     c60:	c0 e0       	ldi	r28, 0x00	; 0
     c62:	d0 e0       	ldi	r29, 0x00	; 0
     c64:	05 c0       	rjmp	.+10     	; 0xc70 <SRF_startAllRanging+0x18>
	// do not conflict with each other
//	char line[20];
	for( int i=0; i<numSonar; i+=2 ) {
//		sprintf( line, "Start: %d\n", i );
//		sendString( line );
		SRF_startRanging( i, units );
     c66:	61 2f       	mov	r22, r17
     c68:	8c 2f       	mov	r24, r28
     c6a:	0e 94 0b 06 	call	0xc16	; 0xc16 <SRF_startRanging>
void SRF_startAllRanging( char units )
{
	// Start ranging on every other device so that adjacent sonars
	// do not conflict with each other
//	char line[20];
	for( int i=0; i<numSonar; i+=2 ) {
     c6e:	22 96       	adiw	r28, 0x02	; 2
     c70:	80 91 d0 01 	lds	r24, 0x01D0
     c74:	90 e0       	ldi	r25, 0x00	; 0
     c76:	c8 17       	cp	r28, r24
     c78:	d9 07       	cpc	r29, r25
     c7a:	ac f3       	brlt	.-22     	; 0xc66 <SRF_startAllRanging+0xe>
     c7c:	c1 e0       	ldi	r28, 0x01	; 1
     c7e:	d0 e0       	ldi	r29, 0x00	; 0
     c80:	05 c0       	rjmp	.+10     	; 0xc8c <SRF_startAllRanging+0x34>
		//_delay_ms( 10 );
	}
	for( int i=1; i<numSonar; i+=2 ) {
//		sprintf( line, "Start: %d\n", i );
//mk		sendString( line );
		SRF_startRanging( i, units );
     c82:	61 2f       	mov	r22, r17
     c84:	8c 2f       	mov	r24, r28
     c86:	0e 94 0b 06 	call	0xc16	; 0xc16 <SRF_startRanging>
//		sprintf( line, "Start: %d\n", i );
//		sendString( line );
		SRF_startRanging( i, units );
		//_delay_ms( 10 );
	}
	for( int i=1; i<numSonar; i+=2 ) {
     c8a:	22 96       	adiw	r28, 0x02	; 2
     c8c:	80 91 d0 01 	lds	r24, 0x01D0
     c90:	90 e0       	ldi	r25, 0x00	; 0
     c92:	c8 17       	cp	r28, r24
     c94:	d9 07       	cpc	r29, r25
     c96:	ac f3       	brlt	.-22     	; 0xc82 <SRF_startAllRanging+0x2a>
//mk		sendString( line );
		SRF_startRanging( i, units );
		//_delay_ms( 10 );
	}

}
     c98:	df 91       	pop	r29
     c9a:	cf 91       	pop	r28
     c9c:	1f 91       	pop	r17
     c9e:	08 95       	ret

00000ca0 <SRF_getRange>:
	return ranges;
}


uint16_t SRF_getRange( uint8_t deviceNum )
{
     ca0:	df 92       	push	r13
     ca2:	ef 92       	push	r14
     ca4:	ff 92       	push	r15
     ca6:	0f 93       	push	r16
     ca8:	1f 93       	push	r17
     caa:	08 2f       	mov	r16, r24
// FINISHED RANGING
int8_t SRF_isFinishedRanging( uint8_t index )
{
	int8_t version;

	version = SRF_getVersion( index );
     cac:	0e 94 f9 05 	call	0xbf2	; 0xbf2 <SRF_getVersion>
		finished = SRF_isFinishedRanging( deviceNum );
	}while( finished == SRF_FALSE );


	// Address must be an odd number to signify reading from the register
	i2cMessageBuf[0] = SRF_BASE_ADDR + (deviceNum << 1) + 1;
     cb0:	d0 2e       	mov	r13, r16
     cb2:	dd 0c       	add	r13, r13
     cb4:	81 ee       	ldi	r24, 0xE1	; 225
     cb6:	d8 0e       	add	r13, r24
     cb8:	9a e0       	ldi	r25, 0x0A	; 10
     cba:	e9 2e       	mov	r14, r25
     cbc:	92 e0       	ldi	r25, 0x02	; 2
     cbe:	f9 2e       	mov	r15, r25
     cc0:	d0 92 0a 02 	sts	0x020A, r13
	i2cMessageBuf[1] = SRF_RANGE_HIGH_REG; // High byte of range
     cc4:	82 e0       	ldi	r24, 0x02	; 2
     cc6:	80 93 0b 02 	sts	0x020B, r24
	USI_TWI_Start_Read_Write( i2cMessageBuf, 2 );
     cca:	62 e0       	ldi	r22, 0x02	; 2
     ccc:	c7 01       	movw	r24, r14
     cce:	0e 94 b2 03 	call	0x764	; 0x764 <USI_TWI_Start_Read_Write>
	range = (short)i2cMessageBuf[1] << 8;
     cd2:	10 91 0b 02 	lds	r17, 0x020B
     cd6:	00 e0       	ldi	r16, 0x00	; 0

	i2cMessageBuf[0] = SRF_BASE_ADDR + (deviceNum << 1) + 1; // Address of device
     cd8:	d0 92 0a 02 	sts	0x020A, r13
	i2cMessageBuf[1] = SRF_RANGE_LOW_REG; // Low byte of range
     cdc:	83 e0       	ldi	r24, 0x03	; 3
     cde:	80 93 0b 02 	sts	0x020B, r24
	USI_TWI_Start_Read_Write( i2cMessageBuf, 2 );
     ce2:	62 e0       	ldi	r22, 0x02	; 2
     ce4:	c7 01       	movw	r24, r14
     ce6:	0e 94 b2 03 	call	0x764	; 0x764 <USI_TWI_Start_Read_Write>
     cea:	20 91 0b 02 	lds	r18, 0x020B
     cee:	30 e0       	ldi	r19, 0x00	; 0
     cf0:	20 2b       	or	r18, r16
     cf2:	31 2b       	or	r19, r17
	range |= (short)i2cMessageBuf[1];

	return range;
}
     cf4:	c9 01       	movw	r24, r18
     cf6:	1f 91       	pop	r17
     cf8:	0f 91       	pop	r16
     cfa:	ff 90       	pop	r15
     cfc:	ef 90       	pop	r14
     cfe:	df 90       	pop	r13
     d00:	08 95       	ret

00000d02 <SRF_completeRange>:



// COMPLETE RANGING COMMAND
uint16_t SRF_completeRange( uint8_t index, char units )
{
     d02:	1f 93       	push	r17
     d04:	18 2f       	mov	r17, r24
	// Start the ranging
	SRF_startRanging( index, units );
     d06:	0e 94 0b 06 	call	0xc16	; 0xc16 <SRF_startRanging>
    milliseconds can be achieved.
 */
void
_delay_loop_2(uint16_t __count)
{
	__asm__ volatile (
     d0a:	84 ef       	ldi	r24, 0xF4	; 244
     d0c:	91 e0       	ldi	r25, 0x01	; 1
     d0e:	01 97       	sbiw	r24, 0x01	; 1
     d10:	f1 f7       	brne	.-4      	; 0xd0e <SRF_completeRange+0xc>
	_delay_ms( 1 );


	// Return the range
	return SRF_getRange( index );
     d12:	81 2f       	mov	r24, r17
     d14:	0e 94 50 06 	call	0xca0	; 0xca0 <SRF_getRange>
}
     d18:	1f 91       	pop	r17
     d1a:	08 95       	ret

00000d1c <SRF_getAllRanges>:



// GET RANGE COMMANDS
uint16_t * SRF_getAllRanges( uint16_t * ranges )
{
     d1c:	ef 92       	push	r14
     d1e:	ff 92       	push	r15
     d20:	0f 93       	push	r16
     d22:	1f 93       	push	r17
     d24:	cf 93       	push	r28
     d26:	df 93       	push	r29
     d28:	f8 2e       	mov	r15, r24
     d2a:	e9 2e       	mov	r14, r25
     d2c:	9c 01       	movw	r18, r24
     d2e:	89 01       	movw	r16, r18
     d30:	c0 e0       	ldi	r28, 0x00	; 0
     d32:	d0 e0       	ldi	r29, 0x00	; 0
     d34:	08 c0       	rjmp	.+16     	; 0xd46 <SRF_getAllRanges+0x2a>
	for( int i=0; i<numSonar; i++ ) {
		ranges[i] = SRF_getRange( i );
     d36:	8c 2f       	mov	r24, r28
     d38:	0e 94 50 06 	call	0xca0	; 0xca0 <SRF_getRange>
     d3c:	f8 01       	movw	r30, r16
     d3e:	81 93       	st	Z+, r24
     d40:	91 93       	st	Z+, r25
     d42:	8f 01       	movw	r16, r30


// GET RANGE COMMANDS
uint16_t * SRF_getAllRanges( uint16_t * ranges )
{
	for( int i=0; i<numSonar; i++ ) {
     d44:	21 96       	adiw	r28, 0x01	; 1
     d46:	80 91 d0 01 	lds	r24, 0x01D0
     d4a:	90 e0       	ldi	r25, 0x00	; 0
     d4c:	c8 17       	cp	r28, r24
     d4e:	d9 07       	cpc	r29, r25
     d50:	94 f3       	brlt	.-28     	; 0xd36 <SRF_getAllRanges+0x1a>
//	sendString( str );

	// --------------

	return ranges;
}
     d52:	8f 2d       	mov	r24, r15
     d54:	9e 2d       	mov	r25, r14
     d56:	df 91       	pop	r29
     d58:	cf 91       	pop	r28
     d5a:	1f 91       	pop	r17
     d5c:	0f 91       	pop	r16
     d5e:	ff 90       	pop	r15
     d60:	ef 90       	pop	r14
     d62:	08 95       	ret

00000d64 <heartBeatThreadInit>:


uint16_t systemTimer;
uint8_t toggle = 0;

void heartBeatThreadInit(void) {
     d64:	10 92 85 00 	sts	0x0085, r1
     d68:	10 92 84 00 	sts	0x0084, r1
	TCNT1 = 0;

	// init timeout value
	// once the TCNT1 counter reaches the OCR1A value, an intterupt
	// is triggered which causes the ISR function to be called
	OCR1A = HEARTBEAT_TIMER_PERIOD;
     d6c:	88 ea       	ldi	r24, 0xA8	; 168
     d6e:	91 e6       	ldi	r25, 0x61	; 97
     d70:	90 93 89 00 	sts	0x0089, r25
     d74:	80 93 88 00 	sts	0x0088, r24

	// clk/8 prescaler, clear at top
	// the prescaler divides the clock speed by 8 because our counter
	// and timeout values are only 8 bits.
	TCCR1B = (1 << WGM12) | (1 << CS11);
     d78:	8a e0       	ldi	r24, 0x0A	; 10
     d7a:	80 93 81 00 	sts	0x0081, r24

	//tells in the interrupt register to call ISR(TIMER1_COMPA_vect)
	TIMSK1 = 1 << OCIE1A;
     d7e:	82 e0       	ldi	r24, 0x02	; 2
     d80:	80 93 6f 00 	sts	0x006F, r24
}
     d84:	08 95       	ret

00000d86 <heartBeatThread>:

/*
 * The heartbeat thread is called by the timer1 interrupt
 * and runs every 100 milliseconds (10 hz)
 */
void heartBeatThread(void) {
     d86:	80 91 0f 02 	lds	r24, 0x020F
     d8a:	90 91 10 02 	lds	r25, 0x0210
     d8e:	01 96       	adiw	r24, 0x01	; 1
     d90:	90 93 10 02 	sts	0x0210, r25
     d94:	80 93 0f 02 	sts	0x020F, r24
	// increment the free-running system timer
	systemTimer++;


	// Only get ranging data when asked for
	if( state == STATE_SEND_DATA )
     d98:	90 91 d1 01 	lds	r25, 0x01D1
     d9c:	91 30       	cpi	r25, 0x01	; 1
     d9e:	29 f5       	brne	.+74     	; 0xdea <heartBeatThread+0x64>
	{
		// check for displaying on the LCD. THis causes the LCD
		// to update quickly for 5 seconds, then display only
		// one set of values for 5 seconds
		if( ++toggle >= TOGGLE_VALUE ) 
     da0:	80 91 d9 01 	lds	r24, 0x01D9
     da4:	8f 5f       	subi	r24, 0xFF	; 255
     da6:	80 93 d9 01 	sts	0x01D9, r24
     daa:	83 32       	cpi	r24, 0x23	; 35
     dac:	58 f0       	brcs	.+22     	; 0xdc4 <heartBeatThread+0x3e>
		{
			toggle = 0;
     dae:	10 92 d9 01 	sts	0x01D9, r1
			if( lcdDisplay == SRF_TRUE )
     db2:	80 91 a8 01 	lds	r24, 0x01A8
     db6:	81 30       	cpi	r24, 0x01	; 1
     db8:	19 f4       	brne	.+6      	; 0xdc0 <heartBeatThread+0x3a>
			{
				lcdDisplay = SRF_FALSE;
     dba:	10 92 a8 01 	sts	0x01A8, r1
     dbe:	02 c0       	rjmp	.+4      	; 0xdc4 <heartBeatThread+0x3e>
			}
			else 
			{
				lcdDisplay = SRF_TRUE;
     dc0:	90 93 a8 01 	sts	0x01A8, r25
		// 3. Get the range result
		//sendString( "Start ranging\n" );	


		// Start the ranging, with the result in CM
		SRF_startAllRanging( SRF_CM );
     dc4:	81 e5       	ldi	r24, 0x51	; 81
     dc6:	0e 94 2c 06 	call	0xc58	; 0xc58 <SRF_startAllRanging>
    can be achieved.
*/
void
_delay_loop_1(uint8_t __count)
{
	__asm__ volatile (
     dca:	80 e1       	ldi	r24, 0x10	; 16
     dcc:	8a 95       	dec	r24
     dce:	f1 f7       	brne	.-4      	; 0xdcc <heartBeatThread+0x46>
		// Sleep for a short while
		_delay_us( 25 );

		// Get the range of all sonar
		//sendString( "Get Ranges\n" );
		dataArray = SRF_getAllRanges( dataArray );
     dd0:	80 91 d3 01 	lds	r24, 0x01D3
     dd4:	90 91 d4 01 	lds	r25, 0x01D4
     dd8:	0e 94 8e 06 	call	0xd1c	; 0xd1c <SRF_getAllRanges>
     ddc:	90 93 d4 01 	sts	0x01D4, r25
     de0:	80 93 d3 01 	sts	0x01D3, r24

		// Set the flag that data is ready
		dataReady = SRF_TRUE;
     de4:	81 e0       	ldi	r24, 0x01	; 1
     de6:	80 93 d2 01 	sts	0x01D2, r24
     dea:	08 95       	ret

00000dec <__vector_7>:
	}
}


// ISR for heartbeat timer.  It just calls the heartbeat thread function
ISR(TIMER1_COMPA_vect) {
     dec:	1f 92       	push	r1
     dee:	0f 92       	push	r0
     df0:	0f b6       	in	r0, 0x3f	; 63
     df2:	0f 92       	push	r0
     df4:	11 24       	eor	r1, r1
     df6:	2f 93       	push	r18
     df8:	3f 93       	push	r19
     dfa:	4f 93       	push	r20
     dfc:	5f 93       	push	r21
     dfe:	6f 93       	push	r22
     e00:	7f 93       	push	r23
     e02:	8f 93       	push	r24
     e04:	9f 93       	push	r25
     e06:	af 93       	push	r26
     e08:	bf 93       	push	r27
     e0a:	ef 93       	push	r30
     e0c:	ff 93       	push	r31
	heartBeatThread();
     e0e:	0e 94 c3 06 	call	0xd86	; 0xd86 <heartBeatThread>
}
     e12:	ff 91       	pop	r31
     e14:	ef 91       	pop	r30
     e16:	bf 91       	pop	r27
     e18:	af 91       	pop	r26
     e1a:	9f 91       	pop	r25
     e1c:	8f 91       	pop	r24
     e1e:	7f 91       	pop	r23
     e20:	6f 91       	pop	r22
     e22:	5f 91       	pop	r21
     e24:	4f 91       	pop	r20
     e26:	3f 91       	pop	r19
     e28:	2f 91       	pop	r18
     e2a:	0f 90       	pop	r0
     e2c:	0f be       	out	0x3f, r0	; 63
     e2e:	0f 90       	pop	r0
     e30:	1f 90       	pop	r1
     e32:	18 95       	reti

00000e34 <joystickInit>:




void joystickInit()
{
     e34:	84 b1       	in	r24, 0x04	; 4
     e36:	14 b8       	out	0x04, r1	; 4
	// Set PINB4 to be an input with the pullup resistor on
	DDRB &= !(1 << PINB4);
	PORTB |= 1 << PINB4;
     e38:	2c 9a       	sbi	0x05, 4	; 5

	// Set pin PORTB4 to interrupt on pin change.
	// This pin is for the center push button
	PCMSK1 = 1 << PINB4;
     e3a:	80 e1       	ldi	r24, 0x10	; 16
     e3c:	80 93 6c 00 	sts	0x006C, r24

	// Enable interrupts for PCINT 8-15. We only need PCINT12
	EIMSK |= 1 << PCIE1;
     e40:	ef 9a       	sbi	0x1d, 7	; 29
	EIFR |= 1 << PCIF1;
     e42:	e7 9a       	sbi	0x1c, 7	; 28
}
     e44:	08 95       	ret

00000e46 <__vector_3>:


// Handle the pin change interrupt.
SIGNAL( SIG_PIN_CHANGE1 )
{
     e46:	1f 92       	push	r1
     e48:	0f 92       	push	r0
     e4a:	0f b6       	in	r0, 0x3f	; 63
     e4c:	0f 92       	push	r0
     e4e:	11 24       	eor	r1, r1
     e50:	2f 93       	push	r18
     e52:	3f 93       	push	r19
     e54:	4f 93       	push	r20
     e56:	5f 93       	push	r21
     e58:	6f 93       	push	r22
     e5a:	7f 93       	push	r23
     e5c:	8f 93       	push	r24
     e5e:	9f 93       	push	r25
     e60:	af 93       	push	r26
     e62:	bf 93       	push	r27
     e64:	ef 93       	push	r30
     e66:	ff 93       	push	r31
	// Toggle the current state of reading data from the
	// sonar so that it can be started without connecting
	// to a computer for test purposes
	if( state == STATE_SEND_DATA )
     e68:	80 91 d1 01 	lds	r24, 0x01D1
     e6c:	81 30       	cpi	r24, 0x01	; 1
     e6e:	19 f4       	brne	.+6      	; 0xe76 <__vector_3+0x30>
	{
		state = STATE_WAIT_FOR_START;
     e70:	10 92 d1 01 	sts	0x01D1, r1
     e74:	03 c0       	rjmp	.+6      	; 0xe7c <__vector_3+0x36>
	}
	else 
	{
		state = STATE_SEND_DATA;
     e76:	81 e0       	ldi	r24, 0x01	; 1
     e78:	80 93 d1 01 	sts	0x01D1, r24
	}

	// If the number of sonar has not been set, then
	// we do not know how many sonars are on the belt.
	// Assume 4
	if( numSonar == 0 )
     e7c:	80 91 d0 01 	lds	r24, 0x01D0
     e80:	88 23       	and	r24, r24
     e82:	59 f4       	brne	.+22     	; 0xe9a <__vector_3+0x54>
	{
		numSonar = 4;
     e84:	84 e0       	ldi	r24, 0x04	; 4
     e86:	80 93 d0 01 	sts	0x01D0, r24
		dataArray = (uint16_t *)malloc( numSonar * sizeof(uint16_t) );
     e8a:	88 e0       	ldi	r24, 0x08	; 8
     e8c:	90 e0       	ldi	r25, 0x00	; 0
     e8e:	0e 94 5f 07 	call	0xebe	; 0xebe <malloc>
     e92:	80 93 d3 01 	sts	0x01D3, r24
     e96:	90 93 d4 01 	sts	0x01D4, r25
	}

	// Delete the flag for pin change interrupt
	EIFR |= 1 << PCIF1;
     e9a:	e7 9a       	sbi	0x1c, 7	; 28
}
     e9c:	ff 91       	pop	r31
     e9e:	ef 91       	pop	r30
     ea0:	bf 91       	pop	r27
     ea2:	af 91       	pop	r26
     ea4:	9f 91       	pop	r25
     ea6:	8f 91       	pop	r24
     ea8:	7f 91       	pop	r23
     eaa:	6f 91       	pop	r22
     eac:	5f 91       	pop	r21
     eae:	4f 91       	pop	r20
     eb0:	3f 91       	pop	r19
     eb2:	2f 91       	pop	r18
     eb4:	0f 90       	pop	r0
     eb6:	0f be       	out	0x3f, r0	; 63
     eb8:	0f 90       	pop	r0
     eba:	1f 90       	pop	r1
     ebc:	18 95       	reti

00000ebe <malloc>:
     ebe:	cf 93       	push	r28
     ec0:	df 93       	push	r29
     ec2:	bc 01       	movw	r22, r24
     ec4:	82 30       	cpi	r24, 0x02	; 2
     ec6:	91 05       	cpc	r25, r1
     ec8:	10 f4       	brcc	.+4      	; 0xece <malloc+0x10>
     eca:	62 e0       	ldi	r22, 0x02	; 2
     ecc:	70 e0       	ldi	r23, 0x00	; 0
     ece:	a0 91 13 02 	lds	r26, 0x0213
     ed2:	b0 91 14 02 	lds	r27, 0x0214
     ed6:	ed 01       	movw	r28, r26
     ed8:	e0 e0       	ldi	r30, 0x00	; 0
     eda:	f0 e0       	ldi	r31, 0x00	; 0
     edc:	40 e0       	ldi	r20, 0x00	; 0
     ede:	50 e0       	ldi	r21, 0x00	; 0
     ee0:	21 c0       	rjmp	.+66     	; 0xf24 <malloc+0x66>
     ee2:	88 81       	ld	r24, Y
     ee4:	99 81       	ldd	r25, Y+1	; 0x01
     ee6:	86 17       	cp	r24, r22
     ee8:	97 07       	cpc	r25, r23
     eea:	69 f4       	brne	.+26     	; 0xf06 <malloc+0x48>
     eec:	8a 81       	ldd	r24, Y+2	; 0x02
     eee:	9b 81       	ldd	r25, Y+3	; 0x03
     ef0:	30 97       	sbiw	r30, 0x00	; 0
     ef2:	19 f0       	breq	.+6      	; 0xefa <malloc+0x3c>
     ef4:	93 83       	std	Z+3, r25	; 0x03
     ef6:	82 83       	std	Z+2, r24	; 0x02
     ef8:	04 c0       	rjmp	.+8      	; 0xf02 <malloc+0x44>
     efa:	90 93 14 02 	sts	0x0214, r25
     efe:	80 93 13 02 	sts	0x0213, r24
     f02:	fe 01       	movw	r30, r28
     f04:	34 c0       	rjmp	.+104    	; 0xf6e <malloc+0xb0>
     f06:	68 17       	cp	r22, r24
     f08:	79 07       	cpc	r23, r25
     f0a:	38 f4       	brcc	.+14     	; 0xf1a <malloc+0x5c>
     f0c:	41 15       	cp	r20, r1
     f0e:	51 05       	cpc	r21, r1
     f10:	19 f0       	breq	.+6      	; 0xf18 <malloc+0x5a>
     f12:	84 17       	cp	r24, r20
     f14:	95 07       	cpc	r25, r21
     f16:	08 f4       	brcc	.+2      	; 0xf1a <malloc+0x5c>
     f18:	ac 01       	movw	r20, r24
     f1a:	fe 01       	movw	r30, r28
     f1c:	8a 81       	ldd	r24, Y+2	; 0x02
     f1e:	9b 81       	ldd	r25, Y+3	; 0x03
     f20:	9c 01       	movw	r18, r24
     f22:	e9 01       	movw	r28, r18
     f24:	20 97       	sbiw	r28, 0x00	; 0
     f26:	e9 f6       	brne	.-70     	; 0xee2 <malloc+0x24>
     f28:	41 15       	cp	r20, r1
     f2a:	51 05       	cpc	r21, r1
     f2c:	a9 f1       	breq	.+106    	; 0xf98 <malloc+0xda>
     f2e:	ca 01       	movw	r24, r20
     f30:	86 1b       	sub	r24, r22
     f32:	97 0b       	sbc	r25, r23
     f34:	04 97       	sbiw	r24, 0x04	; 4
     f36:	08 f4       	brcc	.+2      	; 0xf3a <malloc+0x7c>
     f38:	ba 01       	movw	r22, r20
     f3a:	e0 e0       	ldi	r30, 0x00	; 0
     f3c:	f0 e0       	ldi	r31, 0x00	; 0
     f3e:	2a c0       	rjmp	.+84     	; 0xf94 <malloc+0xd6>
     f40:	8d 91       	ld	r24, X+
     f42:	9c 91       	ld	r25, X
     f44:	11 97       	sbiw	r26, 0x01	; 1
     f46:	84 17       	cp	r24, r20
     f48:	95 07       	cpc	r25, r21
     f4a:	f9 f4       	brne	.+62     	; 0xf8a <malloc+0xcc>
     f4c:	64 17       	cp	r22, r20
     f4e:	75 07       	cpc	r23, r21
     f50:	81 f4       	brne	.+32     	; 0xf72 <malloc+0xb4>
     f52:	12 96       	adiw	r26, 0x02	; 2
     f54:	8d 91       	ld	r24, X+
     f56:	9c 91       	ld	r25, X
     f58:	13 97       	sbiw	r26, 0x03	; 3
     f5a:	30 97       	sbiw	r30, 0x00	; 0
     f5c:	19 f0       	breq	.+6      	; 0xf64 <malloc+0xa6>
     f5e:	93 83       	std	Z+3, r25	; 0x03
     f60:	82 83       	std	Z+2, r24	; 0x02
     f62:	04 c0       	rjmp	.+8      	; 0xf6c <malloc+0xae>
     f64:	90 93 14 02 	sts	0x0214, r25
     f68:	80 93 13 02 	sts	0x0213, r24
     f6c:	fd 01       	movw	r30, r26
     f6e:	32 96       	adiw	r30, 0x02	; 2
     f70:	4c c0       	rjmp	.+152    	; 0x100a <malloc+0x14c>
     f72:	ca 01       	movw	r24, r20
     f74:	86 1b       	sub	r24, r22
     f76:	97 0b       	sbc	r25, r23
     f78:	fd 01       	movw	r30, r26
     f7a:	e8 0f       	add	r30, r24
     f7c:	f9 1f       	adc	r31, r25
     f7e:	61 93       	st	Z+, r22
     f80:	71 93       	st	Z+, r23
     f82:	02 97       	sbiw	r24, 0x02	; 2
     f84:	8d 93       	st	X+, r24
     f86:	9c 93       	st	X, r25
     f88:	40 c0       	rjmp	.+128    	; 0x100a <malloc+0x14c>
     f8a:	fd 01       	movw	r30, r26
     f8c:	82 81       	ldd	r24, Z+2	; 0x02
     f8e:	93 81       	ldd	r25, Z+3	; 0x03
     f90:	9c 01       	movw	r18, r24
     f92:	d9 01       	movw	r26, r18
     f94:	10 97       	sbiw	r26, 0x00	; 0
     f96:	a1 f6       	brne	.-88     	; 0xf40 <malloc+0x82>
     f98:	80 91 11 02 	lds	r24, 0x0211
     f9c:	90 91 12 02 	lds	r25, 0x0212
     fa0:	89 2b       	or	r24, r25
     fa2:	41 f4       	brne	.+16     	; 0xfb4 <malloc+0xf6>
     fa4:	80 91 cc 01 	lds	r24, 0x01CC
     fa8:	90 91 cd 01 	lds	r25, 0x01CD
     fac:	90 93 12 02 	sts	0x0212, r25
     fb0:	80 93 11 02 	sts	0x0211, r24
     fb4:	40 91 ce 01 	lds	r20, 0x01CE
     fb8:	50 91 cf 01 	lds	r21, 0x01CF
     fbc:	41 15       	cp	r20, r1
     fbe:	51 05       	cpc	r21, r1
     fc0:	41 f4       	brne	.+16     	; 0xfd2 <malloc+0x114>
     fc2:	4d b7       	in	r20, 0x3d	; 61
     fc4:	5e b7       	in	r21, 0x3e	; 62
     fc6:	80 91 ca 01 	lds	r24, 0x01CA
     fca:	90 91 cb 01 	lds	r25, 0x01CB
     fce:	48 1b       	sub	r20, r24
     fd0:	59 0b       	sbc	r21, r25
     fd2:	20 91 11 02 	lds	r18, 0x0211
     fd6:	30 91 12 02 	lds	r19, 0x0212
     fda:	ca 01       	movw	r24, r20
     fdc:	82 1b       	sub	r24, r18
     fde:	93 0b       	sbc	r25, r19
     fe0:	86 17       	cp	r24, r22
     fe2:	97 07       	cpc	r25, r23
     fe4:	80 f0       	brcs	.+32     	; 0x1006 <malloc+0x148>
     fe6:	ab 01       	movw	r20, r22
     fe8:	4e 5f       	subi	r20, 0xFE	; 254
     fea:	5f 4f       	sbci	r21, 0xFF	; 255
     fec:	84 17       	cp	r24, r20
     fee:	95 07       	cpc	r25, r21
     ff0:	50 f0       	brcs	.+20     	; 0x1006 <malloc+0x148>
     ff2:	42 0f       	add	r20, r18
     ff4:	53 1f       	adc	r21, r19
     ff6:	50 93 12 02 	sts	0x0212, r21
     ffa:	40 93 11 02 	sts	0x0211, r20
     ffe:	f9 01       	movw	r30, r18
    1000:	61 93       	st	Z+, r22
    1002:	71 93       	st	Z+, r23
    1004:	02 c0       	rjmp	.+4      	; 0x100a <malloc+0x14c>
    1006:	e0 e0       	ldi	r30, 0x00	; 0
    1008:	f0 e0       	ldi	r31, 0x00	; 0
    100a:	cf 01       	movw	r24, r30
    100c:	df 91       	pop	r29
    100e:	cf 91       	pop	r28
    1010:	08 95       	ret

00001012 <free>:
    1012:	cf 93       	push	r28
    1014:	df 93       	push	r29
    1016:	00 97       	sbiw	r24, 0x00	; 0
    1018:	09 f4       	brne	.+2      	; 0x101c <free+0xa>
    101a:	50 c0       	rjmp	.+160    	; 0x10bc <free+0xaa>
    101c:	ec 01       	movw	r28, r24
    101e:	22 97       	sbiw	r28, 0x02	; 2
    1020:	1b 82       	std	Y+3, r1	; 0x03
    1022:	1a 82       	std	Y+2, r1	; 0x02
    1024:	a0 91 13 02 	lds	r26, 0x0213
    1028:	b0 91 14 02 	lds	r27, 0x0214
    102c:	10 97       	sbiw	r26, 0x00	; 0
    102e:	09 f1       	breq	.+66     	; 0x1072 <free+0x60>
    1030:	40 e0       	ldi	r20, 0x00	; 0
    1032:	50 e0       	ldi	r21, 0x00	; 0
    1034:	ac 17       	cp	r26, r28
    1036:	bd 07       	cpc	r27, r29
    1038:	08 f1       	brcs	.+66     	; 0x107c <free+0x6a>
    103a:	bb 83       	std	Y+3, r27	; 0x03
    103c:	aa 83       	std	Y+2, r26	; 0x02
    103e:	fe 01       	movw	r30, r28
    1040:	21 91       	ld	r18, Z+
    1042:	31 91       	ld	r19, Z+
    1044:	e2 0f       	add	r30, r18
    1046:	f3 1f       	adc	r31, r19
    1048:	ae 17       	cp	r26, r30
    104a:	bf 07       	cpc	r27, r31
    104c:	79 f4       	brne	.+30     	; 0x106c <free+0x5a>
    104e:	8d 91       	ld	r24, X+
    1050:	9c 91       	ld	r25, X
    1052:	11 97       	sbiw	r26, 0x01	; 1
    1054:	28 0f       	add	r18, r24
    1056:	39 1f       	adc	r19, r25
    1058:	2e 5f       	subi	r18, 0xFE	; 254
    105a:	3f 4f       	sbci	r19, 0xFF	; 255
    105c:	39 83       	std	Y+1, r19	; 0x01
    105e:	28 83       	st	Y, r18
    1060:	12 96       	adiw	r26, 0x02	; 2
    1062:	8d 91       	ld	r24, X+
    1064:	9c 91       	ld	r25, X
    1066:	13 97       	sbiw	r26, 0x03	; 3
    1068:	9b 83       	std	Y+3, r25	; 0x03
    106a:	8a 83       	std	Y+2, r24	; 0x02
    106c:	41 15       	cp	r20, r1
    106e:	51 05       	cpc	r21, r1
    1070:	71 f4       	brne	.+28     	; 0x108e <free+0x7c>
    1072:	d0 93 14 02 	sts	0x0214, r29
    1076:	c0 93 13 02 	sts	0x0213, r28
    107a:	20 c0       	rjmp	.+64     	; 0x10bc <free+0xaa>
    107c:	12 96       	adiw	r26, 0x02	; 2
    107e:	8d 91       	ld	r24, X+
    1080:	9c 91       	ld	r25, X
    1082:	13 97       	sbiw	r26, 0x03	; 3
    1084:	ad 01       	movw	r20, r26
    1086:	00 97       	sbiw	r24, 0x00	; 0
    1088:	11 f0       	breq	.+4      	; 0x108e <free+0x7c>
    108a:	dc 01       	movw	r26, r24
    108c:	d3 cf       	rjmp	.-90     	; 0x1034 <free+0x22>
    108e:	fa 01       	movw	r30, r20
    1090:	d3 83       	std	Z+3, r29	; 0x03
    1092:	c2 83       	std	Z+2, r28	; 0x02
    1094:	21 91       	ld	r18, Z+
    1096:	31 91       	ld	r19, Z+
    1098:	e2 0f       	add	r30, r18
    109a:	f3 1f       	adc	r31, r19
    109c:	ce 17       	cp	r28, r30
    109e:	df 07       	cpc	r29, r31
    10a0:	69 f4       	brne	.+26     	; 0x10bc <free+0xaa>
    10a2:	88 81       	ld	r24, Y
    10a4:	99 81       	ldd	r25, Y+1	; 0x01
    10a6:	28 0f       	add	r18, r24
    10a8:	39 1f       	adc	r19, r25
    10aa:	2e 5f       	subi	r18, 0xFE	; 254
    10ac:	3f 4f       	sbci	r19, 0xFF	; 255
    10ae:	fa 01       	movw	r30, r20
    10b0:	31 83       	std	Z+1, r19	; 0x01
    10b2:	20 83       	st	Z, r18
    10b4:	8a 81       	ldd	r24, Y+2	; 0x02
    10b6:	9b 81       	ldd	r25, Y+3	; 0x03
    10b8:	93 83       	std	Z+3, r25	; 0x03
    10ba:	82 83       	std	Z+2, r24	; 0x02
    10bc:	df 91       	pop	r29
    10be:	cf 91       	pop	r28
    10c0:	08 95       	ret

000010c2 <atoi>:
    10c2:	fc 01       	movw	r30, r24
    10c4:	88 27       	eor	r24, r24
    10c6:	99 27       	eor	r25, r25
    10c8:	e8 94       	clt
    10ca:	21 91       	ld	r18, Z+
    10cc:	20 32       	cpi	r18, 0x20	; 32
    10ce:	e9 f3       	breq	.-6      	; 0x10ca <atoi+0x8>
    10d0:	29 30       	cpi	r18, 0x09	; 9
    10d2:	10 f0       	brcs	.+4      	; 0x10d8 <atoi+0x16>
    10d4:	2e 30       	cpi	r18, 0x0E	; 14
    10d6:	c8 f3       	brcs	.-14     	; 0x10ca <atoi+0x8>
    10d8:	2b 32       	cpi	r18, 0x2B	; 43
    10da:	41 f0       	breq	.+16     	; 0x10ec <atoi+0x2a>
    10dc:	2d 32       	cpi	r18, 0x2D	; 45
    10de:	39 f4       	brne	.+14     	; 0x10ee <atoi+0x2c>
    10e0:	68 94       	set
    10e2:	04 c0       	rjmp	.+8      	; 0x10ec <atoi+0x2a>
    10e4:	0e 94 8d 08 	call	0x111a	; 0x111a <__mulhi_const_10>
    10e8:	82 0f       	add	r24, r18
    10ea:	91 1d       	adc	r25, r1
    10ec:	21 91       	ld	r18, Z+
    10ee:	20 53       	subi	r18, 0x30	; 48
    10f0:	2a 30       	cpi	r18, 0x0A	; 10
    10f2:	c0 f3       	brcs	.-16     	; 0x10e4 <atoi+0x22>
    10f4:	1e f4       	brtc	.+6      	; 0x10fc <atoi+0x3a>
    10f6:	90 95       	com	r25
    10f8:	81 95       	neg	r24
    10fa:	9f 4f       	sbci	r25, 0xFF	; 255
    10fc:	08 95       	ret

000010fe <strncmp>:
    10fe:	fb 01       	movw	r30, r22
    1100:	dc 01       	movw	r26, r24
    1102:	41 50       	subi	r20, 0x01	; 1
    1104:	50 40       	sbci	r21, 0x00	; 0
    1106:	30 f0       	brcs	.+12     	; 0x1114 <strncmp+0x16>
    1108:	8d 91       	ld	r24, X+
    110a:	01 90       	ld	r0, Z+
    110c:	80 19       	sub	r24, r0
    110e:	19 f4       	brne	.+6      	; 0x1116 <strncmp+0x18>
    1110:	00 20       	and	r0, r0
    1112:	b9 f7       	brne	.-18     	; 0x1102 <strncmp+0x4>
    1114:	88 1b       	sub	r24, r24
    1116:	99 0b       	sbc	r25, r25
    1118:	08 95       	ret

0000111a <__mulhi_const_10>:
    111a:	7a e0       	ldi	r23, 0x0A	; 10
    111c:	97 9f       	mul	r25, r23
    111e:	90 2d       	mov	r25, r0
    1120:	87 9f       	mul	r24, r23
    1122:	80 2d       	mov	r24, r0
    1124:	91 0d       	add	r25, r1
    1126:	11 24       	eor	r1, r1
    1128:	08 95       	ret

0000112a <sprintf>:
    112a:	ae e0       	ldi	r26, 0x0E	; 14
    112c:	b0 e0       	ldi	r27, 0x00	; 0
    112e:	eb e9       	ldi	r30, 0x9B	; 155
    1130:	f8 e0       	ldi	r31, 0x08	; 8
    1132:	0c 94 45 0b 	jmp	0x168a	; 0x168a <__prologue_saves__+0x1c>
    1136:	0d 89       	ldd	r16, Y+21	; 0x15
    1138:	1e 89       	ldd	r17, Y+22	; 0x16
    113a:	86 e0       	ldi	r24, 0x06	; 6
    113c:	8c 83       	std	Y+4, r24	; 0x04
    113e:	1a 83       	std	Y+2, r17	; 0x02
    1140:	09 83       	std	Y+1, r16	; 0x01
    1142:	8f ef       	ldi	r24, 0xFF	; 255
    1144:	9f e7       	ldi	r25, 0x7F	; 127
    1146:	9e 83       	std	Y+6, r25	; 0x06
    1148:	8d 83       	std	Y+5, r24	; 0x05
    114a:	ce 01       	movw	r24, r28
    114c:	49 96       	adiw	r24, 0x19	; 25
    114e:	ac 01       	movw	r20, r24
    1150:	6f 89       	ldd	r22, Y+23	; 0x17
    1152:	78 8d       	ldd	r23, Y+24	; 0x18
    1154:	ce 01       	movw	r24, r28
    1156:	01 96       	adiw	r24, 0x01	; 1
    1158:	0e 94 b8 08 	call	0x1170	; 0x1170 <vfprintf>
    115c:	2f 81       	ldd	r18, Y+7	; 0x07
    115e:	38 85       	ldd	r19, Y+8	; 0x08
    1160:	02 0f       	add	r16, r18
    1162:	13 1f       	adc	r17, r19
    1164:	f8 01       	movw	r30, r16
    1166:	10 82       	st	Z, r1
    1168:	2e 96       	adiw	r28, 0x0e	; 14
    116a:	e4 e0       	ldi	r30, 0x04	; 4
    116c:	0c 94 61 0b 	jmp	0x16c2	; 0x16c2 <__epilogue_restores__+0x1c>

00001170 <vfprintf>:
    1170:	ab e0       	ldi	r26, 0x0B	; 11
    1172:	b0 e0       	ldi	r27, 0x00	; 0
    1174:	ee eb       	ldi	r30, 0xBE	; 190
    1176:	f8 e0       	ldi	r31, 0x08	; 8
    1178:	0c 94 37 0b 	jmp	0x166e	; 0x166e <__prologue_saves__>
    117c:	3c 01       	movw	r6, r24
    117e:	2b 01       	movw	r4, r22
    1180:	5a 01       	movw	r10, r20
    1182:	fc 01       	movw	r30, r24
    1184:	17 82       	std	Z+7, r1	; 0x07
    1186:	16 82       	std	Z+6, r1	; 0x06
    1188:	83 81       	ldd	r24, Z+3	; 0x03
    118a:	81 fd       	sbrc	r24, 1
    118c:	03 c0       	rjmp	.+6      	; 0x1194 <vfprintf+0x24>
    118e:	6f ef       	ldi	r22, 0xFF	; 255
    1190:	7f ef       	ldi	r23, 0xFF	; 255
    1192:	c8 c1       	rjmp	.+912    	; 0x1524 <vfprintf+0x3b4>
    1194:	9a e0       	ldi	r25, 0x0A	; 10
    1196:	89 2e       	mov	r8, r25
    1198:	1e 01       	movw	r2, r28
    119a:	08 94       	sec
    119c:	21 1c       	adc	r2, r1
    119e:	31 1c       	adc	r3, r1
    11a0:	f3 01       	movw	r30, r6
    11a2:	23 81       	ldd	r18, Z+3	; 0x03
    11a4:	f2 01       	movw	r30, r4
    11a6:	23 fd       	sbrc	r18, 3
    11a8:	85 91       	lpm	r24, Z+
    11aa:	23 ff       	sbrs	r18, 3
    11ac:	81 91       	ld	r24, Z+
    11ae:	2f 01       	movw	r4, r30
    11b0:	88 23       	and	r24, r24
    11b2:	09 f4       	brne	.+2      	; 0x11b6 <vfprintf+0x46>
    11b4:	b4 c1       	rjmp	.+872    	; 0x151e <vfprintf+0x3ae>
    11b6:	85 32       	cpi	r24, 0x25	; 37
    11b8:	39 f4       	brne	.+14     	; 0x11c8 <vfprintf+0x58>
    11ba:	23 fd       	sbrc	r18, 3
    11bc:	85 91       	lpm	r24, Z+
    11be:	23 ff       	sbrs	r18, 3
    11c0:	81 91       	ld	r24, Z+
    11c2:	2f 01       	movw	r4, r30
    11c4:	85 32       	cpi	r24, 0x25	; 37
    11c6:	29 f4       	brne	.+10     	; 0x11d2 <vfprintf+0x62>
    11c8:	b3 01       	movw	r22, r6
    11ca:	90 e0       	ldi	r25, 0x00	; 0
    11cc:	0e 94 ad 0a 	call	0x155a	; 0x155a <fputc>
    11d0:	e7 cf       	rjmp	.-50     	; 0x11a0 <vfprintf+0x30>
    11d2:	98 2f       	mov	r25, r24
    11d4:	dd 24       	eor	r13, r13
    11d6:	cc 24       	eor	r12, r12
    11d8:	99 24       	eor	r9, r9
    11da:	ff e1       	ldi	r31, 0x1F	; 31
    11dc:	fd 15       	cp	r31, r13
    11de:	d0 f0       	brcs	.+52     	; 0x1214 <vfprintf+0xa4>
    11e0:	9b 32       	cpi	r25, 0x2B	; 43
    11e2:	69 f0       	breq	.+26     	; 0x11fe <vfprintf+0x8e>
    11e4:	9c 32       	cpi	r25, 0x2C	; 44
    11e6:	28 f4       	brcc	.+10     	; 0x11f2 <vfprintf+0x82>
    11e8:	90 32       	cpi	r25, 0x20	; 32
    11ea:	59 f0       	breq	.+22     	; 0x1202 <vfprintf+0x92>
    11ec:	93 32       	cpi	r25, 0x23	; 35
    11ee:	91 f4       	brne	.+36     	; 0x1214 <vfprintf+0xa4>
    11f0:	0e c0       	rjmp	.+28     	; 0x120e <vfprintf+0x9e>
    11f2:	9d 32       	cpi	r25, 0x2D	; 45
    11f4:	49 f0       	breq	.+18     	; 0x1208 <vfprintf+0x98>
    11f6:	90 33       	cpi	r25, 0x30	; 48
    11f8:	69 f4       	brne	.+26     	; 0x1214 <vfprintf+0xa4>
    11fa:	41 e0       	ldi	r20, 0x01	; 1
    11fc:	24 c0       	rjmp	.+72     	; 0x1246 <vfprintf+0xd6>
    11fe:	52 e0       	ldi	r21, 0x02	; 2
    1200:	d5 2a       	or	r13, r21
    1202:	84 e0       	ldi	r24, 0x04	; 4
    1204:	d8 2a       	or	r13, r24
    1206:	28 c0       	rjmp	.+80     	; 0x1258 <vfprintf+0xe8>
    1208:	98 e0       	ldi	r25, 0x08	; 8
    120a:	d9 2a       	or	r13, r25
    120c:	25 c0       	rjmp	.+74     	; 0x1258 <vfprintf+0xe8>
    120e:	e0 e1       	ldi	r30, 0x10	; 16
    1210:	de 2a       	or	r13, r30
    1212:	22 c0       	rjmp	.+68     	; 0x1258 <vfprintf+0xe8>
    1214:	d7 fc       	sbrc	r13, 7
    1216:	29 c0       	rjmp	.+82     	; 0x126a <vfprintf+0xfa>
    1218:	89 2f       	mov	r24, r25
    121a:	80 53       	subi	r24, 0x30	; 48
    121c:	8a 30       	cpi	r24, 0x0A	; 10
    121e:	70 f4       	brcc	.+28     	; 0x123c <vfprintf+0xcc>
    1220:	d6 fe       	sbrs	r13, 6
    1222:	05 c0       	rjmp	.+10     	; 0x122e <vfprintf+0xbe>
    1224:	98 9c       	mul	r9, r8
    1226:	90 2c       	mov	r9, r0
    1228:	11 24       	eor	r1, r1
    122a:	98 0e       	add	r9, r24
    122c:	15 c0       	rjmp	.+42     	; 0x1258 <vfprintf+0xe8>
    122e:	c8 9c       	mul	r12, r8
    1230:	c0 2c       	mov	r12, r0
    1232:	11 24       	eor	r1, r1
    1234:	c8 0e       	add	r12, r24
    1236:	f0 e2       	ldi	r31, 0x20	; 32
    1238:	df 2a       	or	r13, r31
    123a:	0e c0       	rjmp	.+28     	; 0x1258 <vfprintf+0xe8>
    123c:	9e 32       	cpi	r25, 0x2E	; 46
    123e:	29 f4       	brne	.+10     	; 0x124a <vfprintf+0xda>
    1240:	d6 fc       	sbrc	r13, 6
    1242:	6d c1       	rjmp	.+730    	; 0x151e <vfprintf+0x3ae>
    1244:	40 e4       	ldi	r20, 0x40	; 64
    1246:	d4 2a       	or	r13, r20
    1248:	07 c0       	rjmp	.+14     	; 0x1258 <vfprintf+0xe8>
    124a:	9c 36       	cpi	r25, 0x6C	; 108
    124c:	19 f4       	brne	.+6      	; 0x1254 <vfprintf+0xe4>
    124e:	50 e8       	ldi	r21, 0x80	; 128
    1250:	d5 2a       	or	r13, r21
    1252:	02 c0       	rjmp	.+4      	; 0x1258 <vfprintf+0xe8>
    1254:	98 36       	cpi	r25, 0x68	; 104
    1256:	49 f4       	brne	.+18     	; 0x126a <vfprintf+0xfa>
    1258:	f2 01       	movw	r30, r4
    125a:	23 fd       	sbrc	r18, 3
    125c:	95 91       	lpm	r25, Z+
    125e:	23 ff       	sbrs	r18, 3
    1260:	91 91       	ld	r25, Z+
    1262:	2f 01       	movw	r4, r30
    1264:	99 23       	and	r25, r25
    1266:	09 f0       	breq	.+2      	; 0x126a <vfprintf+0xfa>
    1268:	b8 cf       	rjmp	.-144    	; 0x11da <vfprintf+0x6a>
    126a:	89 2f       	mov	r24, r25
    126c:	85 54       	subi	r24, 0x45	; 69
    126e:	83 30       	cpi	r24, 0x03	; 3
    1270:	18 f0       	brcs	.+6      	; 0x1278 <vfprintf+0x108>
    1272:	80 52       	subi	r24, 0x20	; 32
    1274:	83 30       	cpi	r24, 0x03	; 3
    1276:	38 f4       	brcc	.+14     	; 0x1286 <vfprintf+0x116>
    1278:	44 e0       	ldi	r20, 0x04	; 4
    127a:	50 e0       	ldi	r21, 0x00	; 0
    127c:	a4 0e       	add	r10, r20
    127e:	b5 1e       	adc	r11, r21
    1280:	5f e3       	ldi	r21, 0x3F	; 63
    1282:	59 83       	std	Y+1, r21	; 0x01
    1284:	0f c0       	rjmp	.+30     	; 0x12a4 <vfprintf+0x134>
    1286:	93 36       	cpi	r25, 0x63	; 99
    1288:	31 f0       	breq	.+12     	; 0x1296 <vfprintf+0x126>
    128a:	93 37       	cpi	r25, 0x73	; 115
    128c:	79 f0       	breq	.+30     	; 0x12ac <vfprintf+0x13c>
    128e:	93 35       	cpi	r25, 0x53	; 83
    1290:	09 f0       	breq	.+2      	; 0x1294 <vfprintf+0x124>
    1292:	56 c0       	rjmp	.+172    	; 0x1340 <vfprintf+0x1d0>
    1294:	20 c0       	rjmp	.+64     	; 0x12d6 <vfprintf+0x166>
    1296:	f5 01       	movw	r30, r10
    1298:	80 81       	ld	r24, Z
    129a:	89 83       	std	Y+1, r24	; 0x01
    129c:	42 e0       	ldi	r20, 0x02	; 2
    129e:	50 e0       	ldi	r21, 0x00	; 0
    12a0:	a4 0e       	add	r10, r20
    12a2:	b5 1e       	adc	r11, r21
    12a4:	71 01       	movw	r14, r2
    12a6:	01 e0       	ldi	r16, 0x01	; 1
    12a8:	10 e0       	ldi	r17, 0x00	; 0
    12aa:	12 c0       	rjmp	.+36     	; 0x12d0 <vfprintf+0x160>
    12ac:	f5 01       	movw	r30, r10
    12ae:	e0 80       	ld	r14, Z
    12b0:	f1 80       	ldd	r15, Z+1	; 0x01
    12b2:	d6 fc       	sbrc	r13, 6
    12b4:	03 c0       	rjmp	.+6      	; 0x12bc <vfprintf+0x14c>
    12b6:	6f ef       	ldi	r22, 0xFF	; 255
    12b8:	7f ef       	ldi	r23, 0xFF	; 255
    12ba:	02 c0       	rjmp	.+4      	; 0x12c0 <vfprintf+0x150>
    12bc:	69 2d       	mov	r22, r9
    12be:	70 e0       	ldi	r23, 0x00	; 0
    12c0:	42 e0       	ldi	r20, 0x02	; 2
    12c2:	50 e0       	ldi	r21, 0x00	; 0
    12c4:	a4 0e       	add	r10, r20
    12c6:	b5 1e       	adc	r11, r21
    12c8:	c7 01       	movw	r24, r14
    12ca:	0e 94 a2 0a 	call	0x1544	; 0x1544 <strnlen>
    12ce:	8c 01       	movw	r16, r24
    12d0:	5f e7       	ldi	r21, 0x7F	; 127
    12d2:	d5 22       	and	r13, r21
    12d4:	14 c0       	rjmp	.+40     	; 0x12fe <vfprintf+0x18e>
    12d6:	f5 01       	movw	r30, r10
    12d8:	e0 80       	ld	r14, Z
    12da:	f1 80       	ldd	r15, Z+1	; 0x01
    12dc:	d6 fc       	sbrc	r13, 6
    12de:	03 c0       	rjmp	.+6      	; 0x12e6 <vfprintf+0x176>
    12e0:	6f ef       	ldi	r22, 0xFF	; 255
    12e2:	7f ef       	ldi	r23, 0xFF	; 255
    12e4:	02 c0       	rjmp	.+4      	; 0x12ea <vfprintf+0x17a>
    12e6:	69 2d       	mov	r22, r9
    12e8:	70 e0       	ldi	r23, 0x00	; 0
    12ea:	42 e0       	ldi	r20, 0x02	; 2
    12ec:	50 e0       	ldi	r21, 0x00	; 0
    12ee:	a4 0e       	add	r10, r20
    12f0:	b5 1e       	adc	r11, r21
    12f2:	c7 01       	movw	r24, r14
    12f4:	0e 94 97 0a 	call	0x152e	; 0x152e <strnlen_P>
    12f8:	8c 01       	movw	r16, r24
    12fa:	50 e8       	ldi	r21, 0x80	; 128
    12fc:	d5 2a       	or	r13, r21
    12fe:	d3 fe       	sbrs	r13, 3
    1300:	07 c0       	rjmp	.+14     	; 0x1310 <vfprintf+0x1a0>
    1302:	1a c0       	rjmp	.+52     	; 0x1338 <vfprintf+0x1c8>
    1304:	b3 01       	movw	r22, r6
    1306:	80 e2       	ldi	r24, 0x20	; 32
    1308:	90 e0       	ldi	r25, 0x00	; 0
    130a:	0e 94 ad 0a 	call	0x155a	; 0x155a <fputc>
    130e:	ca 94       	dec	r12
    1310:	8c 2d       	mov	r24, r12
    1312:	90 e0       	ldi	r25, 0x00	; 0
    1314:	08 17       	cp	r16, r24
    1316:	19 07       	cpc	r17, r25
    1318:	a8 f3       	brcs	.-22     	; 0x1304 <vfprintf+0x194>
    131a:	0e c0       	rjmp	.+28     	; 0x1338 <vfprintf+0x1c8>
    131c:	f7 01       	movw	r30, r14
    131e:	d7 fc       	sbrc	r13, 7
    1320:	85 91       	lpm	r24, Z+
    1322:	d7 fe       	sbrs	r13, 7
    1324:	81 91       	ld	r24, Z+
    1326:	7f 01       	movw	r14, r30
    1328:	b3 01       	movw	r22, r6
    132a:	90 e0       	ldi	r25, 0x00	; 0
    132c:	0e 94 ad 0a 	call	0x155a	; 0x155a <fputc>
    1330:	c1 10       	cpse	r12, r1
    1332:	ca 94       	dec	r12
    1334:	01 50       	subi	r16, 0x01	; 1
    1336:	10 40       	sbci	r17, 0x00	; 0
    1338:	01 15       	cp	r16, r1
    133a:	11 05       	cpc	r17, r1
    133c:	79 f7       	brne	.-34     	; 0x131c <vfprintf+0x1ac>
    133e:	ec c0       	rjmp	.+472    	; 0x1518 <vfprintf+0x3a8>
    1340:	94 36       	cpi	r25, 0x64	; 100
    1342:	11 f0       	breq	.+4      	; 0x1348 <vfprintf+0x1d8>
    1344:	99 36       	cpi	r25, 0x69	; 105
    1346:	71 f5       	brne	.+92     	; 0x13a4 <vfprintf+0x234>
    1348:	d7 fe       	sbrs	r13, 7
    134a:	08 c0       	rjmp	.+16     	; 0x135c <vfprintf+0x1ec>
    134c:	f5 01       	movw	r30, r10
    134e:	e0 80       	ld	r14, Z
    1350:	f1 80       	ldd	r15, Z+1	; 0x01
    1352:	02 81       	ldd	r16, Z+2	; 0x02
    1354:	13 81       	ldd	r17, Z+3	; 0x03
    1356:	44 e0       	ldi	r20, 0x04	; 4
    1358:	50 e0       	ldi	r21, 0x00	; 0
    135a:	0a c0       	rjmp	.+20     	; 0x1370 <vfprintf+0x200>
    135c:	f5 01       	movw	r30, r10
    135e:	80 81       	ld	r24, Z
    1360:	91 81       	ldd	r25, Z+1	; 0x01
    1362:	7c 01       	movw	r14, r24
    1364:	00 27       	eor	r16, r16
    1366:	f7 fc       	sbrc	r15, 7
    1368:	00 95       	com	r16
    136a:	10 2f       	mov	r17, r16
    136c:	42 e0       	ldi	r20, 0x02	; 2
    136e:	50 e0       	ldi	r21, 0x00	; 0
    1370:	a4 0e       	add	r10, r20
    1372:	b5 1e       	adc	r11, r21
    1374:	5f e6       	ldi	r21, 0x6F	; 111
    1376:	d5 22       	and	r13, r21
    1378:	17 ff       	sbrs	r17, 7
    137a:	0a c0       	rjmp	.+20     	; 0x1390 <vfprintf+0x220>
    137c:	10 95       	com	r17
    137e:	00 95       	com	r16
    1380:	f0 94       	com	r15
    1382:	e0 94       	com	r14
    1384:	e1 1c       	adc	r14, r1
    1386:	f1 1c       	adc	r15, r1
    1388:	01 1d       	adc	r16, r1
    138a:	11 1d       	adc	r17, r1
    138c:	80 e8       	ldi	r24, 0x80	; 128
    138e:	d8 2a       	or	r13, r24
    1390:	2a e0       	ldi	r18, 0x0A	; 10
    1392:	30 e0       	ldi	r19, 0x00	; 0
    1394:	a1 01       	movw	r20, r2
    1396:	c8 01       	movw	r24, r16
    1398:	b7 01       	movw	r22, r14
    139a:	0e 94 d9 0a 	call	0x15b2	; 0x15b2 <__ultoa_invert>
    139e:	f8 2e       	mov	r15, r24
    13a0:	f2 18       	sub	r15, r2
    13a2:	40 c0       	rjmp	.+128    	; 0x1424 <vfprintf+0x2b4>
    13a4:	95 37       	cpi	r25, 0x75	; 117
    13a6:	29 f4       	brne	.+10     	; 0x13b2 <vfprintf+0x242>
    13a8:	1d 2d       	mov	r17, r13
    13aa:	1f 7e       	andi	r17, 0xEF	; 239
    13ac:	2a e0       	ldi	r18, 0x0A	; 10
    13ae:	30 e0       	ldi	r19, 0x00	; 0
    13b0:	1d c0       	rjmp	.+58     	; 0x13ec <vfprintf+0x27c>
    13b2:	1d 2d       	mov	r17, r13
    13b4:	19 7f       	andi	r17, 0xF9	; 249
    13b6:	9f 36       	cpi	r25, 0x6F	; 111
    13b8:	61 f0       	breq	.+24     	; 0x13d2 <vfprintf+0x262>
    13ba:	90 37       	cpi	r25, 0x70	; 112
    13bc:	20 f4       	brcc	.+8      	; 0x13c6 <vfprintf+0x256>
    13be:	98 35       	cpi	r25, 0x58	; 88
    13c0:	09 f0       	breq	.+2      	; 0x13c4 <vfprintf+0x254>
    13c2:	ad c0       	rjmp	.+346    	; 0x151e <vfprintf+0x3ae>
    13c4:	0f c0       	rjmp	.+30     	; 0x13e4 <vfprintf+0x274>
    13c6:	90 37       	cpi	r25, 0x70	; 112
    13c8:	39 f0       	breq	.+14     	; 0x13d8 <vfprintf+0x268>
    13ca:	98 37       	cpi	r25, 0x78	; 120
    13cc:	09 f0       	breq	.+2      	; 0x13d0 <vfprintf+0x260>
    13ce:	a7 c0       	rjmp	.+334    	; 0x151e <vfprintf+0x3ae>
    13d0:	04 c0       	rjmp	.+8      	; 0x13da <vfprintf+0x26a>
    13d2:	28 e0       	ldi	r18, 0x08	; 8
    13d4:	30 e0       	ldi	r19, 0x00	; 0
    13d6:	0a c0       	rjmp	.+20     	; 0x13ec <vfprintf+0x27c>
    13d8:	10 61       	ori	r17, 0x10	; 16
    13da:	14 fd       	sbrc	r17, 4
    13dc:	14 60       	ori	r17, 0x04	; 4
    13de:	20 e1       	ldi	r18, 0x10	; 16
    13e0:	30 e0       	ldi	r19, 0x00	; 0
    13e2:	04 c0       	rjmp	.+8      	; 0x13ec <vfprintf+0x27c>
    13e4:	14 fd       	sbrc	r17, 4
    13e6:	16 60       	ori	r17, 0x06	; 6
    13e8:	20 e1       	ldi	r18, 0x10	; 16
    13ea:	32 e0       	ldi	r19, 0x02	; 2
    13ec:	17 ff       	sbrs	r17, 7
    13ee:	08 c0       	rjmp	.+16     	; 0x1400 <vfprintf+0x290>
    13f0:	f5 01       	movw	r30, r10
    13f2:	60 81       	ld	r22, Z
    13f4:	71 81       	ldd	r23, Z+1	; 0x01
    13f6:	82 81       	ldd	r24, Z+2	; 0x02
    13f8:	93 81       	ldd	r25, Z+3	; 0x03
    13fa:	44 e0       	ldi	r20, 0x04	; 4
    13fc:	50 e0       	ldi	r21, 0x00	; 0
    13fe:	08 c0       	rjmp	.+16     	; 0x1410 <vfprintf+0x2a0>
    1400:	f5 01       	movw	r30, r10
    1402:	80 81       	ld	r24, Z
    1404:	91 81       	ldd	r25, Z+1	; 0x01
    1406:	bc 01       	movw	r22, r24
    1408:	80 e0       	ldi	r24, 0x00	; 0
    140a:	90 e0       	ldi	r25, 0x00	; 0
    140c:	42 e0       	ldi	r20, 0x02	; 2
    140e:	50 e0       	ldi	r21, 0x00	; 0
    1410:	a4 0e       	add	r10, r20
    1412:	b5 1e       	adc	r11, r21
    1414:	a1 01       	movw	r20, r2
    1416:	0e 94 d9 0a 	call	0x15b2	; 0x15b2 <__ultoa_invert>
    141a:	f8 2e       	mov	r15, r24
    141c:	f2 18       	sub	r15, r2
    141e:	8f e7       	ldi	r24, 0x7F	; 127
    1420:	d8 2e       	mov	r13, r24
    1422:	d1 22       	and	r13, r17
    1424:	d6 fe       	sbrs	r13, 6
    1426:	0b c0       	rjmp	.+22     	; 0x143e <vfprintf+0x2ce>
    1428:	5e ef       	ldi	r21, 0xFE	; 254
    142a:	d5 22       	and	r13, r21
    142c:	f9 14       	cp	r15, r9
    142e:	38 f4       	brcc	.+14     	; 0x143e <vfprintf+0x2ce>
    1430:	d4 fe       	sbrs	r13, 4
    1432:	07 c0       	rjmp	.+14     	; 0x1442 <vfprintf+0x2d2>
    1434:	d2 fc       	sbrc	r13, 2
    1436:	05 c0       	rjmp	.+10     	; 0x1442 <vfprintf+0x2d2>
    1438:	8f ee       	ldi	r24, 0xEF	; 239
    143a:	d8 22       	and	r13, r24
    143c:	02 c0       	rjmp	.+4      	; 0x1442 <vfprintf+0x2d2>
    143e:	1f 2d       	mov	r17, r15
    1440:	01 c0       	rjmp	.+2      	; 0x1444 <vfprintf+0x2d4>
    1442:	19 2d       	mov	r17, r9
    1444:	d4 fe       	sbrs	r13, 4
    1446:	0d c0       	rjmp	.+26     	; 0x1462 <vfprintf+0x2f2>
    1448:	fe 01       	movw	r30, r28
    144a:	ef 0d       	add	r30, r15
    144c:	f1 1d       	adc	r31, r1
    144e:	80 81       	ld	r24, Z
    1450:	80 33       	cpi	r24, 0x30	; 48
    1452:	19 f4       	brne	.+6      	; 0x145a <vfprintf+0x2ea>
    1454:	99 ee       	ldi	r25, 0xE9	; 233
    1456:	d9 22       	and	r13, r25
    1458:	08 c0       	rjmp	.+16     	; 0x146a <vfprintf+0x2fa>
    145a:	1f 5f       	subi	r17, 0xFF	; 255
    145c:	d2 fe       	sbrs	r13, 2
    145e:	05 c0       	rjmp	.+10     	; 0x146a <vfprintf+0x2fa>
    1460:	03 c0       	rjmp	.+6      	; 0x1468 <vfprintf+0x2f8>
    1462:	8d 2d       	mov	r24, r13
    1464:	86 78       	andi	r24, 0x86	; 134
    1466:	09 f0       	breq	.+2      	; 0x146a <vfprintf+0x2fa>
    1468:	1f 5f       	subi	r17, 0xFF	; 255
    146a:	0d 2d       	mov	r16, r13
    146c:	d3 fc       	sbrc	r13, 3
    146e:	14 c0       	rjmp	.+40     	; 0x1498 <vfprintf+0x328>
    1470:	d0 fe       	sbrs	r13, 0
    1472:	0f c0       	rjmp	.+30     	; 0x1492 <vfprintf+0x322>
    1474:	1c 15       	cp	r17, r12
    1476:	10 f0       	brcs	.+4      	; 0x147c <vfprintf+0x30c>
    1478:	9f 2c       	mov	r9, r15
    147a:	0b c0       	rjmp	.+22     	; 0x1492 <vfprintf+0x322>
    147c:	9f 2c       	mov	r9, r15
    147e:	9c 0c       	add	r9, r12
    1480:	91 1a       	sub	r9, r17
    1482:	1c 2d       	mov	r17, r12
    1484:	06 c0       	rjmp	.+12     	; 0x1492 <vfprintf+0x322>
    1486:	b3 01       	movw	r22, r6
    1488:	80 e2       	ldi	r24, 0x20	; 32
    148a:	90 e0       	ldi	r25, 0x00	; 0
    148c:	0e 94 ad 0a 	call	0x155a	; 0x155a <fputc>
    1490:	1f 5f       	subi	r17, 0xFF	; 255
    1492:	1c 15       	cp	r17, r12
    1494:	c0 f3       	brcs	.-16     	; 0x1486 <vfprintf+0x316>
    1496:	04 c0       	rjmp	.+8      	; 0x14a0 <vfprintf+0x330>
    1498:	1c 15       	cp	r17, r12
    149a:	10 f4       	brcc	.+4      	; 0x14a0 <vfprintf+0x330>
    149c:	c1 1a       	sub	r12, r17
    149e:	01 c0       	rjmp	.+2      	; 0x14a2 <vfprintf+0x332>
    14a0:	cc 24       	eor	r12, r12
    14a2:	04 ff       	sbrs	r16, 4
    14a4:	10 c0       	rjmp	.+32     	; 0x14c6 <vfprintf+0x356>
    14a6:	b3 01       	movw	r22, r6
    14a8:	80 e3       	ldi	r24, 0x30	; 48
    14aa:	90 e0       	ldi	r25, 0x00	; 0
    14ac:	0e 94 ad 0a 	call	0x155a	; 0x155a <fputc>
    14b0:	02 ff       	sbrs	r16, 2
    14b2:	1e c0       	rjmp	.+60     	; 0x14f0 <vfprintf+0x380>
    14b4:	01 fd       	sbrc	r16, 1
    14b6:	03 c0       	rjmp	.+6      	; 0x14be <vfprintf+0x34e>
    14b8:	88 e7       	ldi	r24, 0x78	; 120
    14ba:	90 e0       	ldi	r25, 0x00	; 0
    14bc:	02 c0       	rjmp	.+4      	; 0x14c2 <vfprintf+0x352>
    14be:	88 e5       	ldi	r24, 0x58	; 88
    14c0:	90 e0       	ldi	r25, 0x00	; 0
    14c2:	b3 01       	movw	r22, r6
    14c4:	0c c0       	rjmp	.+24     	; 0x14de <vfprintf+0x36e>
    14c6:	80 2f       	mov	r24, r16
    14c8:	86 78       	andi	r24, 0x86	; 134
    14ca:	91 f0       	breq	.+36     	; 0x14f0 <vfprintf+0x380>
    14cc:	01 ff       	sbrs	r16, 1
    14ce:	02 c0       	rjmp	.+4      	; 0x14d4 <vfprintf+0x364>
    14d0:	8b e2       	ldi	r24, 0x2B	; 43
    14d2:	01 c0       	rjmp	.+2      	; 0x14d6 <vfprintf+0x366>
    14d4:	80 e2       	ldi	r24, 0x20	; 32
    14d6:	d7 fc       	sbrc	r13, 7
    14d8:	8d e2       	ldi	r24, 0x2D	; 45
    14da:	b3 01       	movw	r22, r6
    14dc:	90 e0       	ldi	r25, 0x00	; 0
    14de:	0e 94 ad 0a 	call	0x155a	; 0x155a <fputc>
    14e2:	06 c0       	rjmp	.+12     	; 0x14f0 <vfprintf+0x380>
    14e4:	b3 01       	movw	r22, r6
    14e6:	80 e3       	ldi	r24, 0x30	; 48
    14e8:	90 e0       	ldi	r25, 0x00	; 0
    14ea:	0e 94 ad 0a 	call	0x155a	; 0x155a <fputc>
    14ee:	9a 94       	dec	r9
    14f0:	f9 14       	cp	r15, r9
    14f2:	c0 f3       	brcs	.-16     	; 0x14e4 <vfprintf+0x374>
    14f4:	fa 94       	dec	r15
    14f6:	f1 01       	movw	r30, r2
    14f8:	ef 0d       	add	r30, r15
    14fa:	f1 1d       	adc	r31, r1
    14fc:	b3 01       	movw	r22, r6
    14fe:	80 81       	ld	r24, Z
    1500:	90 e0       	ldi	r25, 0x00	; 0
    1502:	0e 94 ad 0a 	call	0x155a	; 0x155a <fputc>
    1506:	ff 20       	and	r15, r15
    1508:	a9 f7       	brne	.-22     	; 0x14f4 <vfprintf+0x384>
    150a:	06 c0       	rjmp	.+12     	; 0x1518 <vfprintf+0x3a8>
    150c:	b3 01       	movw	r22, r6
    150e:	80 e2       	ldi	r24, 0x20	; 32
    1510:	90 e0       	ldi	r25, 0x00	; 0
    1512:	0e 94 ad 0a 	call	0x155a	; 0x155a <fputc>
    1516:	ca 94       	dec	r12
    1518:	cc 20       	and	r12, r12
    151a:	c1 f7       	brne	.-16     	; 0x150c <vfprintf+0x39c>
    151c:	41 ce       	rjmp	.-894    	; 0x11a0 <vfprintf+0x30>
    151e:	f3 01       	movw	r30, r6
    1520:	66 81       	ldd	r22, Z+6	; 0x06
    1522:	77 81       	ldd	r23, Z+7	; 0x07
    1524:	cb 01       	movw	r24, r22
    1526:	2b 96       	adiw	r28, 0x0b	; 11
    1528:	e2 e1       	ldi	r30, 0x12	; 18
    152a:	0c 94 53 0b 	jmp	0x16a6	; 0x16a6 <__epilogue_restores__>

0000152e <strnlen_P>:
    152e:	fc 01       	movw	r30, r24
    1530:	05 90       	lpm	r0, Z+
    1532:	61 50       	subi	r22, 0x01	; 1
    1534:	70 40       	sbci	r23, 0x00	; 0
    1536:	01 10       	cpse	r0, r1
    1538:	d8 f7       	brcc	.-10     	; 0x1530 <strnlen_P+0x2>
    153a:	80 95       	com	r24
    153c:	90 95       	com	r25
    153e:	8e 0f       	add	r24, r30
    1540:	9f 1f       	adc	r25, r31
    1542:	08 95       	ret

00001544 <strnlen>:
    1544:	fc 01       	movw	r30, r24
    1546:	61 50       	subi	r22, 0x01	; 1
    1548:	70 40       	sbci	r23, 0x00	; 0
    154a:	01 90       	ld	r0, Z+
    154c:	01 10       	cpse	r0, r1
    154e:	d8 f7       	brcc	.-10     	; 0x1546 <strnlen+0x2>
    1550:	80 95       	com	r24
    1552:	90 95       	com	r25
    1554:	8e 0f       	add	r24, r30
    1556:	9f 1f       	adc	r25, r31
    1558:	08 95       	ret

0000155a <fputc>:
    155a:	0f 93       	push	r16
    155c:	1f 93       	push	r17
    155e:	cf 93       	push	r28
    1560:	df 93       	push	r29
    1562:	8c 01       	movw	r16, r24
    1564:	eb 01       	movw	r28, r22
    1566:	8b 81       	ldd	r24, Y+3	; 0x03
    1568:	81 ff       	sbrs	r24, 1
    156a:	1b c0       	rjmp	.+54     	; 0x15a2 <fputc+0x48>
    156c:	82 ff       	sbrs	r24, 2
    156e:	0d c0       	rjmp	.+26     	; 0x158a <fputc+0x30>
    1570:	2e 81       	ldd	r18, Y+6	; 0x06
    1572:	3f 81       	ldd	r19, Y+7	; 0x07
    1574:	8c 81       	ldd	r24, Y+4	; 0x04
    1576:	9d 81       	ldd	r25, Y+5	; 0x05
    1578:	28 17       	cp	r18, r24
    157a:	39 07       	cpc	r19, r25
    157c:	64 f4       	brge	.+24     	; 0x1596 <fputc+0x3c>
    157e:	e8 81       	ld	r30, Y
    1580:	f9 81       	ldd	r31, Y+1	; 0x01
    1582:	01 93       	st	Z+, r16
    1584:	f9 83       	std	Y+1, r31	; 0x01
    1586:	e8 83       	st	Y, r30
    1588:	06 c0       	rjmp	.+12     	; 0x1596 <fputc+0x3c>
    158a:	e8 85       	ldd	r30, Y+8	; 0x08
    158c:	f9 85       	ldd	r31, Y+9	; 0x09
    158e:	80 2f       	mov	r24, r16
    1590:	09 95       	icall
    1592:	89 2b       	or	r24, r25
    1594:	31 f4       	brne	.+12     	; 0x15a2 <fputc+0x48>
    1596:	8e 81       	ldd	r24, Y+6	; 0x06
    1598:	9f 81       	ldd	r25, Y+7	; 0x07
    159a:	01 96       	adiw	r24, 0x01	; 1
    159c:	9f 83       	std	Y+7, r25	; 0x07
    159e:	8e 83       	std	Y+6, r24	; 0x06
    15a0:	02 c0       	rjmp	.+4      	; 0x15a6 <fputc+0x4c>
    15a2:	0f ef       	ldi	r16, 0xFF	; 255
    15a4:	1f ef       	ldi	r17, 0xFF	; 255
    15a6:	c8 01       	movw	r24, r16
    15a8:	df 91       	pop	r29
    15aa:	cf 91       	pop	r28
    15ac:	1f 91       	pop	r17
    15ae:	0f 91       	pop	r16
    15b0:	08 95       	ret

000015b2 <__ultoa_invert>:
    15b2:	fa 01       	movw	r30, r20
    15b4:	aa 27       	eor	r26, r26
    15b6:	28 30       	cpi	r18, 0x08	; 8
    15b8:	51 f1       	breq	.+84     	; 0x160e <__ultoa_invert+0x5c>
    15ba:	20 31       	cpi	r18, 0x10	; 16
    15bc:	81 f1       	breq	.+96     	; 0x161e <__ultoa_invert+0x6c>
    15be:	e8 94       	clt
    15c0:	6f 93       	push	r22
    15c2:	6e 7f       	andi	r22, 0xFE	; 254
    15c4:	6e 5f       	subi	r22, 0xFE	; 254
    15c6:	7f 4f       	sbci	r23, 0xFF	; 255
    15c8:	8f 4f       	sbci	r24, 0xFF	; 255
    15ca:	9f 4f       	sbci	r25, 0xFF	; 255
    15cc:	af 4f       	sbci	r26, 0xFF	; 255
    15ce:	b1 e0       	ldi	r27, 0x01	; 1
    15d0:	3e d0       	rcall	.+124    	; 0x164e <__ultoa_invert+0x9c>
    15d2:	b4 e0       	ldi	r27, 0x04	; 4
    15d4:	3c d0       	rcall	.+120    	; 0x164e <__ultoa_invert+0x9c>
    15d6:	67 0f       	add	r22, r23
    15d8:	78 1f       	adc	r23, r24
    15da:	89 1f       	adc	r24, r25
    15dc:	9a 1f       	adc	r25, r26
    15de:	a1 1d       	adc	r26, r1
    15e0:	68 0f       	add	r22, r24
    15e2:	79 1f       	adc	r23, r25
    15e4:	8a 1f       	adc	r24, r26
    15e6:	91 1d       	adc	r25, r1
    15e8:	a1 1d       	adc	r26, r1
    15ea:	6a 0f       	add	r22, r26
    15ec:	71 1d       	adc	r23, r1
    15ee:	81 1d       	adc	r24, r1
    15f0:	91 1d       	adc	r25, r1
    15f2:	a1 1d       	adc	r26, r1
    15f4:	20 d0       	rcall	.+64     	; 0x1636 <__ultoa_invert+0x84>
    15f6:	09 f4       	brne	.+2      	; 0x15fa <__ultoa_invert+0x48>
    15f8:	68 94       	set
    15fa:	3f 91       	pop	r19
    15fc:	2a e0       	ldi	r18, 0x0A	; 10
    15fe:	26 9f       	mul	r18, r22
    1600:	11 24       	eor	r1, r1
    1602:	30 19       	sub	r19, r0
    1604:	30 5d       	subi	r19, 0xD0	; 208
    1606:	31 93       	st	Z+, r19
    1608:	de f6       	brtc	.-74     	; 0x15c0 <__ultoa_invert+0xe>
    160a:	cf 01       	movw	r24, r30
    160c:	08 95       	ret
    160e:	46 2f       	mov	r20, r22
    1610:	47 70       	andi	r20, 0x07	; 7
    1612:	40 5d       	subi	r20, 0xD0	; 208
    1614:	41 93       	st	Z+, r20
    1616:	b3 e0       	ldi	r27, 0x03	; 3
    1618:	0f d0       	rcall	.+30     	; 0x1638 <__ultoa_invert+0x86>
    161a:	c9 f7       	brne	.-14     	; 0x160e <__ultoa_invert+0x5c>
    161c:	f6 cf       	rjmp	.-20     	; 0x160a <__ultoa_invert+0x58>
    161e:	46 2f       	mov	r20, r22
    1620:	4f 70       	andi	r20, 0x0F	; 15
    1622:	40 5d       	subi	r20, 0xD0	; 208
    1624:	4a 33       	cpi	r20, 0x3A	; 58
    1626:	18 f0       	brcs	.+6      	; 0x162e <__ultoa_invert+0x7c>
    1628:	49 5d       	subi	r20, 0xD9	; 217
    162a:	31 fd       	sbrc	r19, 1
    162c:	40 52       	subi	r20, 0x20	; 32
    162e:	41 93       	st	Z+, r20
    1630:	02 d0       	rcall	.+4      	; 0x1636 <__ultoa_invert+0x84>
    1632:	a9 f7       	brne	.-22     	; 0x161e <__ultoa_invert+0x6c>
    1634:	ea cf       	rjmp	.-44     	; 0x160a <__ultoa_invert+0x58>
    1636:	b4 e0       	ldi	r27, 0x04	; 4
    1638:	a6 95       	lsr	r26
    163a:	97 95       	ror	r25
    163c:	87 95       	ror	r24
    163e:	77 95       	ror	r23
    1640:	67 95       	ror	r22
    1642:	ba 95       	dec	r27
    1644:	c9 f7       	brne	.-14     	; 0x1638 <__ultoa_invert+0x86>
    1646:	00 97       	sbiw	r24, 0x00	; 0
    1648:	61 05       	cpc	r22, r1
    164a:	71 05       	cpc	r23, r1
    164c:	08 95       	ret
    164e:	9b 01       	movw	r18, r22
    1650:	ac 01       	movw	r20, r24
    1652:	0a 2e       	mov	r0, r26
    1654:	06 94       	lsr	r0
    1656:	57 95       	ror	r21
    1658:	47 95       	ror	r20
    165a:	37 95       	ror	r19
    165c:	27 95       	ror	r18
    165e:	ba 95       	dec	r27
    1660:	c9 f7       	brne	.-14     	; 0x1654 <__ultoa_invert+0xa2>
    1662:	62 0f       	add	r22, r18
    1664:	73 1f       	adc	r23, r19
    1666:	84 1f       	adc	r24, r20
    1668:	95 1f       	adc	r25, r21
    166a:	a0 1d       	adc	r26, r0
    166c:	08 95       	ret

0000166e <__prologue_saves__>:
    166e:	2f 92       	push	r2
    1670:	3f 92       	push	r3
    1672:	4f 92       	push	r4
    1674:	5f 92       	push	r5
    1676:	6f 92       	push	r6
    1678:	7f 92       	push	r7
    167a:	8f 92       	push	r8
    167c:	9f 92       	push	r9
    167e:	af 92       	push	r10
    1680:	bf 92       	push	r11
    1682:	cf 92       	push	r12
    1684:	df 92       	push	r13
    1686:	ef 92       	push	r14
    1688:	ff 92       	push	r15
    168a:	0f 93       	push	r16
    168c:	1f 93       	push	r17
    168e:	cf 93       	push	r28
    1690:	df 93       	push	r29
    1692:	cd b7       	in	r28, 0x3d	; 61
    1694:	de b7       	in	r29, 0x3e	; 62
    1696:	ca 1b       	sub	r28, r26
    1698:	db 0b       	sbc	r29, r27
    169a:	0f b6       	in	r0, 0x3f	; 63
    169c:	f8 94       	cli
    169e:	de bf       	out	0x3e, r29	; 62
    16a0:	0f be       	out	0x3f, r0	; 63
    16a2:	cd bf       	out	0x3d, r28	; 61
    16a4:	09 94       	ijmp

000016a6 <__epilogue_restores__>:
    16a6:	2a 88       	ldd	r2, Y+18	; 0x12
    16a8:	39 88       	ldd	r3, Y+17	; 0x11
    16aa:	48 88       	ldd	r4, Y+16	; 0x10
    16ac:	5f 84       	ldd	r5, Y+15	; 0x0f
    16ae:	6e 84       	ldd	r6, Y+14	; 0x0e
    16b0:	7d 84       	ldd	r7, Y+13	; 0x0d
    16b2:	8c 84       	ldd	r8, Y+12	; 0x0c
    16b4:	9b 84       	ldd	r9, Y+11	; 0x0b
    16b6:	aa 84       	ldd	r10, Y+10	; 0x0a
    16b8:	b9 84       	ldd	r11, Y+9	; 0x09
    16ba:	c8 84       	ldd	r12, Y+8	; 0x08
    16bc:	df 80       	ldd	r13, Y+7	; 0x07
    16be:	ee 80       	ldd	r14, Y+6	; 0x06
    16c0:	fd 80       	ldd	r15, Y+5	; 0x05
    16c2:	0c 81       	ldd	r16, Y+4	; 0x04
    16c4:	1b 81       	ldd	r17, Y+3	; 0x03
    16c6:	aa 81       	ldd	r26, Y+2	; 0x02
    16c8:	b9 81       	ldd	r27, Y+1	; 0x01
    16ca:	ce 0f       	add	r28, r30
    16cc:	d1 1d       	adc	r29, r1
    16ce:	0f b6       	in	r0, 0x3f	; 63
    16d0:	f8 94       	cli
    16d2:	de bf       	out	0x3e, r29	; 62
    16d4:	0f be       	out	0x3f, r0	; 63
    16d6:	cd bf       	out	0x3d, r28	; 61
    16d8:	ed 01       	movw	r28, r26
    16da:	08 95       	ret

000016dc <_exit>:
    16dc:	f8 94       	cli

000016de <__stop_program>:
    16de:	ff cf       	rjmp	.-2      	; 0x16de <__stop_program>
