Submission Deadline: » April 11, 2007 » 5:00pm PST
Notification: » May 2, 2007
Camera-Ready Due: » May 16, 2007 » 5:00pm PST
Workshop: » June 15, 2007
.: Keynote Info
How DBMS takes advantage of future computer systems?
Historically, CMOS scaling provides certain level of performance enhancement automatically. However, that "free" performance enhancement from device scaling will come to an end while CMOS scaling will continue for several more generations. Multi-core has been one architectural feature to improve chip level performance. Partially because of the power dissipation limit, each core of a multi-core chip becomes simpler/smaller and offers weaker single thread performance. In this talk, we will explain how to avoid potential performance bottlenecks when running typical DBMS software on a massive multi-core chip.
For a high-end transaction system, the main memory cost is easily several times of CPU cost; the storage cost is even higher than the main memory cost. We will examine how potential future memory technologies (such as phase-change memory) may impact computer system architecture.
A new class of high volume transaction systems is emerging. Each transaction is relatively simple. However, the potential revenue for each transaction may be very low. Thus, the transaction systems designed for banking-like applications may not be suitable for this new type of applications. We will describe the problem and encourage researchers and practitioners to come up with cost-effective solutions.
Dr. Honesty Young earned his Ph.D. in Computer Science from University of Wisconsin-Madison. Currently he is the Deputy Director and the CTO of IBM China Research Lab. He helped build the first parallel database prototype inside IBM. He led an effort that achieved leadership TPC database benchmark results. He has initiated and managed projects in storage appliances and controllers. He spent a year at IBM Research Division Headquarters as a technical staff. Dr. Young has published more than 40 journal and conference papers, including one best paper and one invited paper. He was the Industrial Program Chair of the Parallel and Distributed Information Systems (PDIS), taught two tutorials at key conferences, and served on the program committees of eight conferences. He is an IBM Master Inventor.