L.A.Barroso, K.Gharachoroloo, R.McNamara, A.Nowatzyk, S.Qadeer, B.Sano, S.Smith, R.Stets, B.Verghese, "Piranha: A Scalable Architecture Based on Single-Chip Multiprocessing", 27th International Symposium on Computer Architecture (ISCA), June 2000
L.A.Barroso, K.Gharachorloo, A.Nowatzyk, B.Verghese, "Impact of Chip-Level Integration on Performance of OLTP Workloads", Sixth International Symposium on High-Performance Computer Architecture (HPCA), January 2000
A. Nowatzyk, "Low-latency photonic network using ultrashort-pulse transmission and time-domain processing", SPIE Conference on Multimeduia network: Security, Displays, Terminals and Gateways, Proceeding Vol. 3228, pp366, Dallas TX, November 1997
F. Pong, M. Browne, G. Aybay, A. Nowatzyk, M. Dubois, “Design Verification of the S3.mp Cache-Coherent Shared Memory System”, IEEE Transactions on Computers, Vol. 47 #1, pp.135, January 1998
A. Saulsbury, F. Pong, A. Nowatzyk, “Missing the Memory Wall: The Case for Processor/Memory Integration”, International Symposium on Computer Architecture, Philadelphia, May 1996
A. Nowatzyk, G. Aybay, M. Browne, E. Kelly, M. Parkin, W. Radke, S. Vishin, “Exploiting Parallelism in Cache Coherency Protocol Engines”, EuroPar’95, Stockholm, August 1995
F. Pong, A. Nowatzyk, G. Aybay, M. Dubois, “Verifying Distributed Directory-based Cache Coherency Protocols: S3.mp, a Case Study”, EuroPar’95, Stockholm, August 1995
A. Nowatzyk, G. Aybay, M. Browne, E. Kelly, M. Parkin, W. Radke, S. Vishin, “The S3.mp Scalable Shared Memory Multiprocessor”, International Conference on Parallel Processing, August 1995
A. Nowatzyk, P. Prucnal, “Are Crossbars Really Dead? The Case for Optical Time Domain Multiplexing”, International Symposium on Computer Architecture, Italy, June 1995
A. Nowatzyk, M. Browne, E. Kelly, M. Parkin, “S-Connect: from Network of Workstations to Supercomputer Performance”, International Symposium on Computer Architecture, Italy, June 1995
A. Nowatzyk, M. Browne, G. Aybay, E. Kelly, D. Lee, M. Monger, M. Parkin, “The S3.mp Architecture: a Local Area Multiprocessor”, 5th Annual ACM Symposium on Parallel Algorithms and Architectures, Velen, Germany, June 1993
A. Nowatzyk, M. Monger, M. Parkin, E. Kelly, M. Browne, G. Aybay, D. Lee, “S3.mp: A multiprocessor in a Matchbox”, third PASA Workshop, April 1993, Bonn Germany. Proceedings in PARS#11, June 1993, ISSN 0177-0454
D. Dill, S. Park, A. Nowatzyk, “Formal Specification of Abstract Memory Models”, Research on Integrated Systems: Proceedings of the 1993 Symposium, Ed. G. Borriello and C. Ebeling, MIT Press, 1993
The Sparc Architecture Manual, Version 9, SPARC International, co-author of the memory model section
F.H. Hsu, T. Anantharaman, M. Campbell, A. Nowatzyk, “A Grandmaster Chess Machine”, Scientific American, October 1990, Vol. 263, #4, pp. 44-50
R. Bisisani, A. Nowatzyk, M. Ravishankar, “Coherent Shared Memory on a Message Passing Machine”, In proceedings of the 1989 International Conference on Parallel Processing
A Nowatzyk, “Application Program Modeling and Performance Prediction Tools for Private Memory Multiprocessors”, 3rd Conference on Hypercube Concurrent Computers and Applications, Passadena CA, January 1988
A. Nowatzyk, “A Metastability Tester”, CMU-SCS technical report TR-87-164
A. Nowatzyk, “Fast Evaluation of Arithmetic Functions”, CMU-SCS technical report TR-85-169
A. Nowatzyk, “Advanced Design Tools for Programmable Logic Devices”, CMU-SCS technical report TR-86-121
M. Schlueter, A. Nowatzyk, “In-Plane Deformation Measurement by Video-Electronic Hologram Interferometry”, Optical Acta, 1980, Vol. 26-6, pp 799-808
A.Nowatzyk, "3D Macro-Cellular Automata Based on Spherical IC Lattices", International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS’98
A. Nowatzyk, “To Boldly Go Where no Electronics Has Gone Before - An Optimistic User’s Perspective on Optical TDM Interconnects”, Invited talk, Conference for Massively Parallel Processing with Optical interconnects, Montreal, May 1997
A. Nowatzyk, G. Aybay, M. Browne, W. Radke, S. Vishin, “Scylla: A Memory Controller with Integrated Protocol Engines for Distributed Shared Memory Support”, HotChips’95, Stanford California, August 1996
A. Nowatzyk, M. Parkin, “The S3.mp Interconnect System and TIC Chip”, IEEE Hot Interconnects’93, August 1993
A. Nowatzyk, M. Browne, E. Kelly, D. Lee, M. Monger, M. Parkin, “The S3.mp Architecture”, Workshop on Scalable Shared Memory Multiprocessors, International Symposium on Computer Architecture, San Diego, May 1993
US6128702 "Integrated processor/memory device with victim data cache"
US6081844 "Point-to-point interconnect communications utility"
US5900011 "Integrated processor/memory device with victim data cache"
US5754789 "Aperatus and method for controlling point-to-point interconnect communication between nodes"
"A Communication Architecture for Multiprocessor Networks", also availbable as CMU technical report TR-89-181 (comuter science department). Zip-ed Postscript version (0.6Mbyte)
Thesis related mystery: How did this research end up being referenced in 29 US patents, including US5503736 "Hydroboost piston pump for reverse osmosis systems" and US5460329 "High speed fuel injector" ? I guess Harry Q Bovik had something to do with this.
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