Newsgroups: comp.robotics
Path: brunix!sgiblab!sgigate.sgi.com!sgi!wdl1!mail!cps233!dombrows
From: dombrows@lds.loral.com (Brian Dombrowski, 5424)
Subject: Re: Flip-Flop....
Message-ID: <1994Feb1.175741.18943@lds.loral.com>
Sender: news@lds.loral.com
Reply-To: dombrows@lds.loral.com
Organization: LORAL Data Systems
References: <GAMIN.94Jan29185913@amadeus.ireq-robot.hydro.qc.ca>
Date: Tue, 1 Feb 1994 17:57:41 GMT
Lines: 19

In article 94Jan29185913@amadeus.ireq-robot.hydro.qc.ca, gamin@ireq-robot.hydro.qc.ca (Martin Boyer) writes:
> >>>>> CHENG BENJAMIN writes:
> 
> >Does anyone know any configuration to make an JK flip-flop's outputs
> >(i.e. Q and Q') be the same state (i.e. both 0 or both 1)?
> 
> Try the configuration that would make both the input and the output of
> an inverter have the same state.
> 
> ;-)
>
How about just tying Q and Q' to Vcc!  :-)  Geeez..
( Remind me not to hire anyone from U of T )

Bd




