Project Ideas
Predicated Trace Cache
Would a predicated trace cache help on an itanium like architecture?
The idea is to store traces which only have instructions that are
predicated true.
Memory Parallelism
Modern caches are reaching a limit on their sizes. Increasing them
would add to the cycle time which would probably negate the decrease
in miss rate. The question to investigate is could we add several
caches and include load instructions with a hint as to which cache to
look in? This is similar in spirit to partitioned register files.
Networks for reconfigurable fabrics
A reconfigurable fabric that is dedicated to computing has
significantly different needs than a traditional FPGA. The NanoFabric
is one such fabric. Local connections can be made point-to-point, but
there will always be some non-local connections needed. For example,
when a pointer to dynamically allocated memory is accessed, a packet
will have to be sent to read the memory word. The packet will have to
be routed to the proper memory address and returned back to the
caller. How should the network be organized? What are the cost
tradeoffs?
Branch Prediction on Hyperblocks
Memory Queues for Pegasus
Squashing unproductive branches in reconfigurable fabrics