Date: Tue, 05 Nov 1996 22:01:56 GMT Server: NCSA/1.5 Content-type: text/html Last-modified: Tue, 18 Jun 1996 15:55:21 GMT Content-length: 1737
Studied the effect of limited broadcast cache-coherence protocols
on invalidation traffic in highly parallel shared-memory multiprocessors.
Our measurements were obtained with the Wisconsin Wind Tunnel.
Designed JIHAD, a ~5500 transistor VLSI DRAM controller, to be used
in a proposed RamLink memory system. The chip was fabricated and
underwent successful testing (i.e., it worked).
Designed and simulated (gate-level) CORDIC hardware to approximate
trigonometric functions in IEEE floating point format.
Developed a queueing model to represent a large-scale shared memory
multiprocessor, using homogenous processing nodes and a constant delay
model.
Modified the Wisconsin Wind Tunnel to support simulation of virtual
memory and demand paging, to study paging behavior of parallel
scientific codes on shared-memory multiprocessors.
Wrote a compiler for ADA/CS, a subset of the ADA programming language.
The target assembler code was a variant of MIPS.
Designed and simulated (gate-level) a simple RISC CPU in the
Galaxy programming environment.