Date: Thu, 07 Nov 1996 19:16:45 GMT Server: NCSA/1.5 Content-type: text/html Last-modified: Mon, 15 Jul 1996 16:28:29 GMT Content-length: 2766 Vijay's Home Page

T.N. Vijaykumar (vijay@cs.wisc.edu)

Professional:

Affiliation:

Computer Sciences Department, University of Wisconsin-Madison

Contact:

Address: Computer Sciences Department, 1210 W. Dayton Street, Madison, WI 53706
Phone: 608-262-6587, Fax: 608-262-9777, Email: vijay@cs.wisc.edu

Advisor:

Guri Sohi

Project:

The Multiscalar Project

Education:

Doctorate: University of Wisconsin-Madison , August 1997
Undergraduate: Birla Institute of Technology and Science, Pilani, India, 1990

Research:

Compiling for the Multiscalar Architecture (Ph.D. Dissertation)
  • Distributed Register File Design
    The Anatomy of the Register File in a Multiscalar Processor, S. Breach, T. N. Vijaykumar, and G. S. Sohi, 27th Annual International Symposium on Microarchitecture (MICRO-27), 1994.
  • Compiling Register Communication
    Register Communication Strategies for the Multiscalar Architecture S. Breach, T. N. Vijaykumar, and G. S. Sohi, Submitted to 29th Annual International Symposium on Microarchitecture (MICRO-29), 1996.
  • Multiscalar Processors
    Multiscalar Processors, G. S. Sohi, S. Breach, and T. N. Vijaykumar, 22th International Symposium on Computer Architecture, 1995.
  • Scheduling Register Communication
    Compiling Register Communication for the Multiscalar Architecture T. N. Vijaykumar, and G. S. Sohi, On going work.
  • Memory Data Dependence Prediction


    Personal:

    My other side !