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From: rnelson@wsuaix.csc.wsu.edu (roger nelson)
Subject: Motorola 8bit microcontroller pinouts
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Date: Tue, 21 Jun 1994 04:07:39 GMT
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                    Motorola 8bit Microcontroller pinouts
                         compiled by Roger Nelson


This is a list of the pinouts of several of the Motorola 8bit microcontroller
families (6800,6801,6802,6803,6804,6805 and 6811).

It may be useful in comparing the features between the families and
versions within the family.


                         
 
Motorola mc6800 mc6802 microcontroller family pinouts.
The 6802 is the same as the 6800 but includes 128 of on chip RAM 
32 bytes of which may be retained during lower power mode.
 
        Model pin number and Special Function

       |6800  |6802 
       |      | 
signal |DIP   | 
------ |------|------
A0      | 09     09
A1      | 10     10
A2      | 11     11
A3      | 12     12
A4      | 13     13
A5      | 14     14
A6      | 15     15
A7      | 16     16
A8      | 17     17
A9      | 18     18
A10     | 19     19
A11     | 20     20
A12     | 22     22
A13     | 23     23
A14     | 24     24
A15     | 25     25
D0      | 33     33
D1      | 32     32
D2      | 31     31
D3      | 30     30
D4      | 29     29
D5      | 28     28
D6      | 27     27
D7      | 26     26
        |
BA      |  7      7
DBE     | 36
EXTAL   |        39
HALT_   |  2      2
IRQ_    |  4      4
NMI_    |  6      6
R/W_    | 34     34
RE      |        36
RESET_  | 40     40
TSC     | 39
VMA     |  5      5
Vcc     |  8      8
Vccstby |        35
Vss     |  1      1
theta1  |  3
E/theta2| 37     37
XTAL    |        38
        |
NoCon   | 35
          38
         
BA       Bus available,  normal mode is low, high when processor has stopped
EXTAL    Crystal clock input
HALT_    Execution of programs continues while high. 
IRQ_     External interrupt (maskable)
NMI_     Non maskable interrupt
RE       RAM enable
RESET_   Reset the external device
theta1   Clock phase
E/theta2 processor and system clock
Vcc      Power voltage
Vccstby  Power for first 32 bits of RAM and RAM enable (for static RAM emul)
VMA      Valid memory address  (The address bus lines denote an address)
Vss      Ground
TSC      Three state control (prevents false reads and writes)
R/W_     Memory and peripheral read/write notification
XTAL     Crystal clock ground

 
Motorola mc6801 mc6803 microcontroller family pinouts.
The mc6803 is identical to the 6801 but doesn't have the single chip mode.
The mc68701 is an EPROM version of the 6801.
 
        Model pin number and Special Function

                                 Version specific
                                 Programable pin
                                 functions

                                 U4 ver
                                 -------
        |Pin|Single| Expnd|Expnd|SCI/  |
        |   |chip  | non- |multi|timer |
signal  |   |      | multi|     |Mode  |
--------|---|------|------|-----|------|
        |   |      |      |     |      |
P10     | 13| I/O  | I/O  | I/O | TIN2 |
P11     | 14| I/O  | I/O  | I/O |TOUT2 |
P12     | 15| I/O  | I/O  | I/O |TOUT3 |
P13     | 16| I/O  | I/O  | I/O |  =   |
P14     | 17| I/O  | I/O  | I/O |  =   |
P15     | 18| I/O  | I/O  | I/O |  =   |
P16     | 19| I/O  | I/O  | I/O |  =   |
P17     | 20| I/O  | I/O  | I/O |  =   |
        |   |      |      |     |      |
P20     |  8| I/O* | I/O* | I/O*| TIN1 |
P21     |  9| I/O* | I/O* | I/O*|TOUT1 |
P22     | 10| I/O* | I/O* | I/O*| Sclk |
P23     | 11| I/O* | I/O* | I/O*| RDATA|
P24     | 12| I/O* | I/O* | I/O*| TDATA|

P20-P22 on reset set the operating mode.
After reset, port 2 can be configured for I/O.
All ports can serve as input ports.
On output, P21 functions as a timer output compare functions.

P30     | 37| I/O  | D0   |A0/D0|  =   |A0/D0| 
P31     | 36| I/O  | D1   |A1/D1|  =   |A1/D1| 
P32     | 35| I/O  | D2   |A2/D2|  =   |A2/D2| 
P33     | 34| I/O  | D3   |A3/D3|  =   |A3/D3| 
P34     | 33| I/O  | D4   |A4/D4|  =   |A4/D4| 
P35     | 32| I/O  | D5   |A5/D5|  =   |A5/D5| 
P36     | 31| I/O  | D6   |A6/D6|  =   |A6/D6| 
P37     | 30| I/O  | D7   |A7/D7|  =   |A7/D7| 
        |   |      |      |     |      |     | 
P40     | 29| I/O  | A0   | A8  |  =   | A8  | 
P41     | 28| I/O  | A1   | A9  |  =   | A9  | 
P42     | 27| I/O  | A2   | A10 |  =   | A10 | 
P43     | 26| I/O  | A3   | A11 |  =   | A11 | 
P44     | 25| I/O  | A4   | A12 |  =   | A12 | 
P45     | 24| I/O  | A5   | A13 |  =   | A13 | 
P46     | 23| I/O  | A6   | A14 |  =   | A14 | 
P47     | 22| I/O  | A7   | A15 |  =   | A15 | 
        |   |      |      |     |      |     | 
SC1     | 39| IS3_ | ISO_ | AS  |  =   | AS  | 
SC2     | 38| OS3_ | R/W_ | R/W_|  =   | R/W_| 
        |   |      |      |     |      |     | 
EXTAL   |  3|      |      |     |      |     | 
IRQ_    |  5|      |      |     |      |     | 
NMI_    |  4|      |      |     |      |     | 
RESET_  |  6|      |      |     |      |     | 
Vcc     |  7|      |      |     |      |     | 
Vccstby | 21|      |      |     |      |     | 
Vss     |  1|      |      |     |      |     | 
E       | 40|      |      |     |      |     | 
XTAL    |  2|      |      |     |      |     | 
        |   |      |      |     |      |     | 
NoCon   | 35|      |      |     |      |     | 
        | 38|      |      |     |      |     | 
         
= indicates no change a function in special function mode

BA       Bus available,  normal mode is low, high when processor has stopped
EXTAL    Crystal clock input
HALT_    Execution of programs continues while high. 
IRQ_     External interrupt (maskable)
NMI_     Non maskable interrupt
RE       RAM enable
RESET_   Reset the external device
Sclk     SCI clock
theta1   Clock phase
TINx     Timer input 
TOUTx    Timer output
E/theta2 processor and system clock
Vcc      Power voltage
Vccstby  Power for first 32 bits of RAM and RAM enable (for static RAM emul)
VMA      Valid memory address  (The address bus lines denote an address)
Vss      Ground
TSC      Three state control (prevents false reads and writes)
R/W_     Memory and peripheral read/write notification
XTAL     Crystal clock ground

 
Motorola mc6804 microcontroller family pinouts.
 
        Model pin number and Special Function

       |6804J1 |6804P2  |
       |J1J2J3 |68704P2 |
signal |DIP    |DIP PLCC|
------ |-------|--------|
PA0    |       |%20     |
PA1    |       |%21     |
PA2    |       |%22     |
PA3    |       |%23     |
PA4    |%16    |%24     |
PA5    |%15    |%25     |
PA6    |%18    |%26     |
PA7    |%19    |%27     |
PB0    |% 8    |%12     |
PB1    |% 9    |%13     |
PB2    |%10    |%14     |
PB3    |%11    |%15     |
PB4    |%12    |%16     |
PB5    |%13    |%17     |
PB6    |%14    |%18     |
PB7    |%15    |%19     |
PC0    |       |% 8     |
PC1    |       |% 9     |
PC2    |       |%10     |
PC3    |       |%11     |
EXTAL  |I 4    |I 4     |
IRQ_   |I 2    |        |
MDS    |I 6    |I 6     |
RESET_ |I20    |I 28    |
TIMER  |I 7    |I 7     |
Vcc/Vdd|I 3    |I 3     |
Vss    |I 1    |I 1     |
XTAL   |I 5    |I 5     |
                        
                        
In the MC6804, while MDS is high, the pins PA6 and PA7 encode the 
operating mode

+ This pin may have multiple functions depending on operating mode.
x Only in the C3 C4 and C8 versions.


EXTAL    Crystal clock input
IRQ_     External interrupt
MDS      Mode select
NUM/Vpp  EPROM programming mode voltage / NonUserMode for EPROMless versions
RESET_   Reset the external device
TIMER    Timer control input
Vcc/Vdd  Power voltage
Vss      Ground
XTAL     Crystal clock ground

 
Motorola mc6805 microcontroller family pinouts.
 
        Model pin number and Special Function

       |6805P2 |6805R2 |6805S2   |68HC05 |68HC05   |68HC05P1|146805|146805
       |6805P6 |6805R3 |6805S3   |68HC05 |68HCL05  |        |      |
       |68705P3|6805U2 |68705S3  |68HC805|68HSC05  |        |      |
       |68705P5|6805U3 |         |       |68HC705  |        |      |
       |       |68705R3|         |  B4   |68HC805  |        |  F2  |  G2
       |       |68705R5|         |  B6   |  C2     |        |      |
       |       |68705U3|         |       |         |        |      |
       |       |68705U5|         |       |C3 C4 C8 |PLCC    |PLCC  |
signal |DIP    |DIP    |DIP      |PLCC   |DIP PLCC |DIP     |DIP   |DIP PLCC
------ |-------|-------|---------|-------|---------|--------|------|--------
PA0    |%20    |%33    |%15      |%31    |%11 12   |%10     |% 6   |%11 12  
PA1    |%21    |%34    |%16      |%30    |%10 11   |% 9     |% 7   |%10 11  
PA2    |%22    |%35    |%17      |%29    |% 9 10   |% 8     |% 8   |% 9 10  
PA3    |%23    |%36    |%18      |%28    |% 8  9   |% 7     |% 9   |% 8  9  
PA4    |%24    |%37    |%19      |%27    |% 7  8   |% 6     |%10   |% 7  8  
PA5    |%25    |%38    |%20      |%26    |% 6  7   |% 5     |%11   |% 6  7  
PA6    |%26    |%39    |%21      |%25    |% 5  6   |% 4     |%12   |% 5  6  
PA7    |%27    |%40    |%22      |%24    |% 4  5   |% 3     |%13   |% 4  4  
PB0    |%12    |%25    |%10 +    |%39    |%12 13   |%       |%22   |%12 13  
PB1    |%13    |%26    |%12 +    |%38    |%13 14   |%       |%21   |%13 14  
PB2    |%14    |%27    |%13 +    |%37    |%14 15   |%       |%20   |%14 15  
PB3    |%15    |%28    |%14 +    |%36    |%15 16   |%       |%19   |%15 16  
PB4    |%16    |%29    |         |%35    |%16 17   |%       |%18   |%16 18  
PB5    |%17    |%30    |         |%34    |%17 19   |%11     |%17   |%17 19  
PB6    |%18    |%31    |         |%33    |%18 20   |%12     |%16   |%18 20  
PB7    |%19    |%32    |         |%32    |%19 21   |%13     |%15   |%19 21  
PC0    |% 8    |% 9    |% 2 +    |%49    |%28 31   |%22     |%26   |%28 31  
PC1    |% 9    |%10    |% 3 +    |%48    |%27 30   |%21     |%25   |%27 30  
PC2    |%10    |%11    |         |%47 +  |%26 29   |%20     |%24   |%26 29  
PC3    |%11    |%12    |         |%46    |%25 28   |%19     |%23   |%25 28  
PC4    |       |%13    |         |%45    |%24 27   |%18     |%     |%24 26  
PC5    |       |%14    |         |%44    |%23 26   |%17     |%     |%23 25  
PC6    |       |%15    |         |%43    |%22 25   |%16     |%     |%22 24  
PC7    |       |%16    |         |%42    |%21 24   |%15     |%     |%21 23  
PD0    |       |I24 +  |I10 +    |I14 +  |I29 32 + |        |      |I29 32  
PD1    |       |I23 +  |I 9 +    |I13 +  |%30 33 + |        |      |I30 33  
PD2    |       |I22 +  |I 8 +    |I12 +  |%31 34 + |        |      |I31 34  
PD3    |       |I21 +  |I 7 +    |I11 +  |%32 35 + |        |      |I32 35  
PD4    |       |I20 +  |I 6 +    |I 9 +  |%33 36 + |        |      |I33 36  
PD5    |       |I19 +  |I 5 +    |I 5 +  |O34 37 + | 23     |      |I34 37  
PD6    |       |I18 +  |I 4      |I 4 +  | -  -    |        |      |I35 38  
PD7    |       |I17    |         |I 3 +  |I36 39   |        |      |I36 40  
AN0    |       |I24 +* |I10 +    |I14 +  |         |        |      |        
AN1    |       |I23 +* |I 9 +    |I13 +  |         |        |      |        
AN2    |       |I22 +* |I 8 +    |I12 +  |         |        |      |        
AN3    |       |I21 +* |I 7 +    |I11 +  |         |        |      |        
AN4    |       |       |I 4 +    |I 9 +  |         |        |      |        
AN5    |       |       |         |I 5 +  |         |        |      |        
AN6    |       |       |         |I 4 +  |         |        |      |        
AN7    |       |       |         |I 3 +  |         |        |      |        
Eclk   |       |       |         |I47 +  |         |        |      |
EXTAL  |I 4    |I 5    |I27      |       |         |        |      |        
INT_   |I 2    |I 3    |I25      |       |         |        |      |        
INT2_  |       |I18 +  |I 4 +    |       |         |        |      |        
IPC    |       |       |         |       |         |        |      |        
IRQ_   |       |       |         |I19    |I 2  2   |I 2     |I 2   |I 2  2  
MISO   |       |       |         |       |%31 34 +x|        |      |
MOSI   |       |       |         |       |%32 35 +x|        |      |
NUM/Vpp|I 6    |I 7    |I28      |I40    |         |        |I 28  |I 3  3  
OSC1   |       |       |         |I16    |I39 43   |I27     |I 4   |I39 42  
OSC2   |       |       |         |O17    |O38 42   |O26     |O 5   |O38 43  
PLMADA |       |       |         |O20    |         |        |      |
PLMBDA |       |       |         |O21    |         |        |      |
Presc1 |       |       |I 2 +    |       |         |        |      |
Presc2 |       |       |I 3 +    |       |         |        |      |
RDI    |       |       |         |I50    |I29 32 +x|        |      |
RESET_ |I28    |I 2    |I23      |%18    |% 1  1   |% 1     |% 1   |% 1  1  
SCIclk |       |       |         |O51    |O33 36 +x|        |      |
SPIclk |       |       |%12 +    |       |         |        |      |
SPID1  |       |       |%13 +    |       |         |        |      |
SPID2  |       |       |%14 +    |       |         |        |      |
SPIss  |       |       |%10 +    |       |         |        |      |
SS_    |       |       |         |       |I34 37 +x|        |      |
TCAP1  |       |       |         |I21    |I37 41   |I25     |      |        
TCAP2  |       |       |         |I22    |         |        |      |        
TCMP1  |       |       |         |O 2    |O35 38   |O24     |      |        
TCMP2  |       |       |         |O 1    |         |        |      |        
TDO    |       |       |         |O52    |O30 33 +x|        |      |
TIMER  |I 7    |I 8    |         |       |         |        |I27   |I37 41  
Vcc/Vdd|I 3    |I 4    |I24      |I10    |I40 44   |I28     |I 3   |I40 44  
Vrh    |       |I19 +  |I 5 +    |I 8    |         |        |      |        
Vrl    |       |I20 +  |I 6 +    |I 7    |         |        |      |        
Vss    |I 1    |I 1    |I 1      |I41    |I20 22   |I14     |I 14  |I20 22  
Vstby  |       |       |  4 +    |       |         |        |      |
XTAL   |I 5    |I 6    |I26      |       |         |        |      |        


NoCon. |       |       |         |  6       3   3                        5
                                   15           4                       17
                                               18                       27
                                               23                       39
                                               40

* The U3 versions don't have the A/D conversion so no ANx lines.
+ This pin may have multiple functions depending on operating mode.
x Only in the C3 C4 and C8 versions.

The MC68HC05L6 is a special version of the family with an additional set of
29 pins for driving a liquid crystal display.  Refer to the Motorola
microcontroller data book Vol II.

The NUM will be replaced by the Vpp in EEPROM versions.

Eclk     External clock applied to the OSC1 input
EXTAL    Crystal clock input
INT_     External interrupt asyncronous
INT2_    External interrupt asyncronous
IPC    
IRQ_     External interrupt
MISO     Master In Slave Out for SPI slave select
MOSI     Master Out Slave In for SPI master mode
NUM/Vpp  EPROM programming mode voltage / NonUserMode for EPROMless versions
OSC1     Control input for on-chip clock oscillator circuit.
OSC2     Control input for on-chip clock oscillator circuit.
Presc1   Timer prescaler  
Presc2   Timer prescaler
PLMADA   Pulse-Length D/A converter output pin A
PLMBDA     "          "           "        pin B
RDI      SCI Receive data in
RESET_   Reset the external device
SCIclk   Clock output for SCI
SPID1    SPI data input or output lines
SPID2      "          "           "
SS_      SPI slave select
TCAP1    Timer input capture
TCAP2    Timer input capture
TCMP1    Timer output compare
TCMP2    Timer output compare
TDO      SCI transmit data out
TIMER    Timer control input
Vcc/Vdd  Power voltage
Vrh      A/D reference voltage upper limit
Vrl      A/D reference voltage lower limit
Vss      Ground
Vstby    Interrupt(2) option standby supply voltage
XTAL     Crystal clock ground

                  
Motorola mc6811 microcontroller family pinouts.

The MC68HC11 versions have the same pinouts with the exception of the D3
which has a 40pin DIP or 44pin PLCC (that version's pinouts are not avail.).

 
        Model pin number and Special Function

                 | Single        | Expand.     Special bootstrap and test
                 | Chip          | multiplex   mode are not documented here
signal |DIP  PCLL|               |
-------|---------|---------------|----------------------------
PA0    |I 8   20 | IC3           | IC3            
PA1    |I 7   21 | IC2           | IC2            
PA2    |I 6   22 | CC1           | IC1            
PA3    |O 5   23 | OC5/and-or OC1| OC5/and-or OC1 
PA4    |O 4   24 | OC4/and-or OC1| OC4/and-or OC1 
PA5    |O 3   25 | OC3/and-or OC1| OC3/and-or OC1 
PA6    |O 2   26 | OC2/and-or OC1| OC2/and-or OC1 
PA7    |% 1   27 | PAI/and-or OC1| PAI/and-or OC1 
PB0    |%16   42 | PB0           | A8
PB1    |%15   41 | PB1           | A9
PB2    |%14   40 | PB2           | A10
PB3    |%13   39 | PB3           | A11
PB4    |%12   38 | PB4           | A12
PB5    |%11   37 | PB5           | A13
PB6    |%10   36 | PB6           | A14
PB7    |% 9   35 | PB7           | A15
PC0    |%38    9 | PC0           | A0/D0
PC1    |%37   10 | PC1           | A1/D1
PC2    |%36   11 | PC2           | A2/D2
PC3    |%35   12 | PC3           | A3/D3
PC4    |%34   13 | PC4           | A4/D4
PC5    |%33   14 | PC5           | A5/D5
PC6    |%32   15 | PC6           | A6/D6
PC7    |%31   16 | PC7           | A7/D7
PD0    |%42   20 | PD0/RxD       | PD0/RxD  
PD1    |%43   21 | PD1/TxD       | PD1/TxD  
PD2    |%44   22 | PD2/MISO      | PD2/MISO 
PD3    |%45   23 | PD3/MOSI      | PD3/MOSI 
PD4    |%46   24 | PD4/Sck       | PD4/Sck  
PD5    |%47   25 | PD5/SS_       | PD5/SS_  
PE0    |I17   43 | PE0/AN0       | PE0/AN0   
PE1    |I18   45 | PE1/AN1       | PE1/AN1   
PE2    |I19   47 | PE2/AN2       | PE2/AN2   
PE3    |I20   49 | PE3/AN3       | PE3/AN3   
PE4    |I -   44 | PE4/AN4       | PE4/AN4   
PE5    |I -   46 | PE5/AN5       | PE5/AN5   
PE6    |I -   48 | PE6/AN6       | PE6/AN6   
PE7    |I -   50 | PE7/AN7       | PE7/AN7   
       |%26    4 | STRA          | AS
       |O28    6 | STRB          | R/W_

Eclk   |O27    5 |
EXTAL  |%29    7 |
IRQ_   |I41 + 19 |
MODA   |I25 +  3 |
MODB   |%24 +  2 |
MISO   |%44 + 22 |
MOSI   |%45 + 23 |
RESET_ |I39   12 |
SPIclk |%35 + 13 |
SPIss_ |I36 + 14 |
STRA   |I26 +  3 |
STRB   |O28 +  2 |
R/W_   |O28 +  6 |
RxD    |I42 + 20 |
TxD    |O43 + 21 |
Vdd    |I48   26 |
Vpp    |I41 + 19 |
Vrh    |I20   52 |
Vrl    |I21   51 |
Vss    |I23    1 |
Vstby  |I24 +  2 |
XIRQ   |I41   18 |
XTAL   |O29    8 |

- Pin is not available in 48 pin version.
+ Pin has multiple functions

The NUM will be replaced by the Vpp in EEPROM versions.

Eclk     External clock applied to the OSC1 input
EXTAL    Crystal clock input
IRQ_     External interrupt
MISO     Master In Slave Out for SPI slave select
MOSI     Master Out Slave In for SPI master mode
Vpp      EPROM programming mode voltage / NonUserMode for EPROMless versions
RESET_   Reset the external device
STRA     Input strobe
STRB     Output strobe
SPIclk   Clock output for SPI
SPIss_   SPI slave select
TCAP1    Timer input capture
TCAP2    Timer input capture
TCMP1    Timer output compare
TCMP2    Timer output compare
TDO      SCI transmit data out
TIMER    Timer control input
Vcc/Vdd  Power voltage
Vrh      A/D reference voltage upper limit
Vrl      A/D reference voltage lower limit
Vss      Ground
Vstby    Interrupt(2) option standby supply voltage
XTAL     Crystal clock ground



--
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