Received: from EDRC.CMU.EDU by A.GP.CS.CMU.EDU id aa19948; 6 Feb 96 17:18:35 EST Received: from dragon.ti.com by EDRC.CMU.EDU id aa08538; 6 Feb 96 17:18:12 EST Received: from daldd.sc.ti.com ([156.117.202.56]) by dragon.ti.com (8.6.12/) with SMTP id QAA18208 for ; Tue, 6 Feb 1996 16:18:23 -0600 Received: from sun_ff9f.sc.ti.com (sun_ff9f.daldd.sc.ti.com) by daldd.sc.ti.com (4.1/SMI-4.1) id AA19999; Tue, 6 Feb 96 16:17:32 CST Date: Tue, 6 Feb 96 16:17:32 CST From: bosshart@daldd.sc.ti.com (Pat Bosshart) Message-Id: <9602062217.AA19999@daldd.sc.ti.com> Received: by sun_ff9f.sc.ti.com (4.1/SMI-4.1) id AA13476; Tue, 6 Feb 96 16:17:31 CST To: ai+lisp-jobs@cs.cmu.edu Subject: Jobs: Six openings for Lisp based, Dynamic Logic CAD development Sender: ai@A.GP.CS.CMU.EDU LOCATION: Dallas, Texas ORGANIZATION: Texas Instruments, Semiconductor Division, Advanced Microprocesor Group. POSITION: Six full time positions. PROJECT: The Advanced Microprocesor Group of Texas Instruments is developing a high end X86 microprocessor which requires the development of a suite of custom CAD tools in order to support the use of aggressive dynamic logic circuit design techniques. The tools are being developed in Lisp and C. QUALIFICATIONS: Strong Common Lisp and CLOS skills (Allegro CL on Sun Platforms). Experience with a programming team, not just one-person projects. Previous Computer Aided Design (CAD) work, preferrably in Lisp, preferably in areas of simulation, synthesis, timing analysis, circuit analysis, or layout. Some VLSI design experience preferable, including using simulation and synthesis tools. Unix and C/C++ skills will be required of some team members. Senior team members will have strong backgrounds in all or most of these areas, less senior members will have experience in most of these areas. DUTIES: Join a senior team to develop CAD tools which will enable the design of high performance X86 microprocessors using dynamic logic. The tools to be developed in Lisp and C include electrical and circuit verification tools, clocking analysis, timing directed dynamic logic synthesis, charge sharing analysis, timing verification, input/ouput parser/generators, floorplan/wiring estimators, incremental database support/development, and support tools for simulation/emulation. Duties will include supporting code in response to bugs reported by designers. CONTACT WITH RESUME: NAME: Patrick Bosshart PHONE: (214) 995-7394 EMAIL: bosshart@hc.ti.com (Pat Bosshart) MAIL: P.O. Box 655474 MS446 Dallas, TX 75265 ------------------------------------------------------------------------------- This message | Submissions ai+lisp-jobs@cs.cmu.edu was sent via | Subscribe/Unsubscribe ai+query@cs.cmu.edu the LISP-JOBS | Available mailing lists include mailing list. | AI-JOBS, LISP-JOBS, PROLOG-JOBS, AI-POSTDOC, AI-PREDOC