AND W/CR's

Goal State: (AND (LS CASE1 SW1 H) (LS CASE1 SW2 H) (RS CASE1 PB1 H) (LS CASE2 SW1 L) (LS CASE2 SW2 H) (RS CASE2 PB1 L) (LS CASE3 SW1 H) (LS CASE3 SW2 L) (RS CASE3 PB1 L) (LS CASE4 SW1 L) (LS CASE4 SW2 L) (RS CASE4 PB1 L))

CPU time: 5.2 seconds
Number of Nodes: 236
Solution Length: 19
Operator Sequence: 

      INFER-SWITCH SW1 CASE1 H
      INFER-SWITCH SW2 CASE1 H
      INFER-SWITCH SW1 CASE2 L
      INFER-SWITCH SW2 CASE2 H
      INFER-SWITCH SW1 CASE3 H
      INFER-SWITCH SW2 CASE3 L
      INFER-SWITCH SW1 CASE4 L
      INFER-SWITCH SW2 CASE4 L
      INFER-NOT-CONNECTED PB1 1
      INFER-NOT-CONNECTED AND2 1
      INFER-NOT-CONNECTED AND2 2
      CONNECT-TO-AND-H AND2 SW2 SW1
      CONNECT-TO-PROBE PB1 AND2
      VERIFY-AND-L AND2 SW2 SW1
      VERIFY-PROBE PB1 AND2
      VERIFY-AND-L AND2 SW2 SW1
      VERIFY-PROBE PB1 AND2
      VERIFY-AND-L AND2 SW2 SW1
      VERIFY-PROBE PB1 AND2


Prodigy: 



