KSR Homework 1

Answer these questions in a few paragraphs. Send your answers to adamb@cs.cmu.edu by class time on Wednesday, December 7.

  1. Are the processors in the KSR1 CISC or RISC? How would you expect CISC vs RISC performance to differ with respect to the KSR memory system.

  2. How many bytes are in a subpage on the KSR?

  3. Frank et al. claim:
    Dynamic memory allocation and data movement of ALLCACHE requires less bandwidth and aggregate storage than MPPs - by dynamically optimizing locality.
    Explain what you think they mean by this statement and why you agree or disagree.

  4. Is isoeffeciency more or less difficult to measure on shared or distributed memory machines? You don't have to agree with Zhang et al. Briefly support your answer.

  5. When is the poststore mechanism of the KSR useful?