15-495: Parallel Computer Architecture and Programming
Fall 2002 Schedule

Table 1: 15-495, Fall 2002.

Class	Date	Day	Topic	Reading	Assignments
1	8/27	Tue	Why Study Parallel Architecture?	1.1
2	8/28	Wed	Evolution of Parallel Architecture	1.2
3	8/29	Thu	Fundamental Design Issues	1.3-4
4	9/3	Tue	Parallel Programming: Overview I	2.1-2	L1 Out
5	9/4	Wed	Parallel Programming: Overview II	2.3-4
6	9/5	Thu	Parallel Programming: Performance I	3.1
7	9/10	Tue	Parallel Programming: Performance II	3.2
8	9/11	Wed	Parallel Programming: Performance III	3.3-4
9	9/12	Thu	Par. Prog: Case Studies & Implications	3.5-6	L2 Out
10	9/17	Tue	Workload-Driven Arch Evaluation I	4.1	L1 Due
11	9/18	Wed	Workload-Driven Arch Evaluation II	4.2-3
12	9/19	Thu	Shared Memory Multiprocessors I	5.1
13	9/24	Tue	Shared Memory Multiprocessors II	5.3
14	9/25	Wed	Shared Memory Multiprocessors III	5.4
15	9/26	Thu	Directory-Based Cache Coherence I	8.1-5	L2 Due, L3 Out
16	10/1	Tue	Directory-Based Cache Coherence II	8.6-7, 8.9-11
17	10/2	Wed	Relaxed Memory Consistency Models	9.1
18	10/3	Thu	Snoop-Based Multiprocessor Design I	6.1
	10/8	Tue	No Class
	10/9	Wed	No Class
19	10/10	Thu	Snoop-Based Multiprocessor Design II	6.2	L3 Due
	10/15	Tue	Exam I
20	10/16	Wed	Snoop-Based Multiprocessor Design III	6.3-4
21	10/17	Thu	Snoop-Based Multiprocessor Design IV	6.5, 6.7
22	10/22	Tue	Synchronization	5.5., 7.9, 8.8	Project Proposal
23	10/23	Wed	Earthquake Simulation Case Study
24	10/24	Thu	Scalable Distributed Memory MPs I	7.1-3
25	10/29	Tue	Scalable Distributed Memory MPs II	7.4-8
26	10/30	Wed	Interconnection Network Design	10.1-10
27	10/31	Thu	Latency Tolerance: Prefetching	11.1, 11.6
28	11/5	Tue	Latency Tolerance: Multithreading	11.7-9	Project Milestone 1
29	11/14	Thu	Terascale Computing System at PSC
	11/19	Tue			Project Milestone 2
	11/21	Thu	Exam II
	12/3	Tue			Project Due
	12/5	Thu	Project Poster Session

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