Newsgroups: comp.robotics
Path: brunix!uunet!think.com!enterpoop.mit.edu!bloom-picayune.mit.edu!athena.mit.edu!spedhead
From: spedhead@athena.mit.edu (Pankaj Oberoi)
Subject: Re: A1 glitching on 6.270 boards
Message-ID: <1993Jan19.150345.26775@athena.mit.edu>
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Organization: Massachusetts Institute of Technology
References: <1993Jan18.032624.28824@athena.mit.edu> <1993Jan18.215956.6919@news.media.mit.edu>
Date: Tue, 19 Jan 1993 15:03:45 GMT
Lines: 42

In article <1993Jan18.215956.6919@news.media.mit.edu>, 
fredm@media.mit.edu (Fred G Martin) writes:

|> So this explanation isn't too convincing.  Also, I'm not clear on what
|> you mean by "when the chip was being reset into the wrong state"---do
|> you mean on chip power-up or on power-down?

The problem is not on the power-up or power-down, but on the reset line.
The switches that are used in the 6.270 contest for the past few years
have too much bounce.  We (Anne Wright, Randy Sargent, and myself) analyzed 
the reset signal with a digital scope and noticed that when there was a 
large transient spike following the pull-down of the reset button, the 
board would cycle through the address bits.

One solution that was a pseduo fix was to place an RC circuit between the
button and the reset line to debounce the switch.  This was a simple hack 
where only one trace was cut.  The board may work with a better switch
that is less "bouncy."  Ideally you would like to debounce the reset line
which can be done by using the low-voltage chip.

When a true debounced switched, using a schmitt trigger was implemented 
for the reset line, the A1 did not crash.

|> With the 6.270 board, however, there is a hardware interrupt that is
|> triggered the moment that power is removed on power-down, during which
|> time system capacitors are still keeping Vcc at reasonable levels.
|> This interrupt causes a software driver to halt the processor by
|> executing the STOP instruction.  This _should_ mean that power-down
|> isn't the source of the problem---the 6811 should go into
|> "hybernation" the moment that power is removed.

This is correct.  The power-down  does protect the RAM.

|> We should have used (low power detector) one in the first place in the board
|> design. 

I agree, and I think that if anyone is planning on redesigning the board,
they should put one in, even though it takes up a little bit of board space.
You may be able to use some of the existing circuitry on the board to build
a debouncer.

-pk-
