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From: stuart (Stuart A. Kurtz)
Subject: Re: Small changes to MacGambit2.2
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References: <FEELEY.95May25115901@raptor.IRO.UMontreal.CA> <FEELEY.95May28172910@chamarti.ai.mit.edu> <bhayes-2805951844170001@ok.pdial.interpath.net> <3qgipp$ajv@lll-winken.llnl.gov>
Date: Wed, 31 May 1995 14:37:09 GMT
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In article <3qgipp$ajv@lll-winken.llnl.gov>, Patrick C. Beard
<beard@cs.ucdavis.edu> wrote:

> In article <3qe00h$16l0@olson.ibmoto.com> Tim Olson, tim@ibmoto.com writes:
> >The 68030 has separate, 256-byte instruction and data caches, but the data
> >cache is write-through, so the cache coherency problems seen with the 68040
> >don't appear.
> >
> >However, I got the exact same lockup on my PowerMac 8100/80, so the problem
> >doesn't have to do with caches...
> 
> Presumably you were running the program in emulation on your PowerMac.
> The emulation  is of a 68040 without an MMU or FPU. Presumably the cache
> behavior of the emulator is compatible with the '040 and is the reason
> for similar problems.

The present '040 emulator doesn't emulate a cache, although there are hints
from Apple that they are working on another, must faster, emulator that will
cache.  To quote from New Inside Mac (Power PC System Software, pg 1-10)...

   The operation of the instruction cache in the 68040 microprocessor is not
   supported by the 68LC040 Emulator, although all of the bits in the Cache 
   Control Register (CACR) and Cache Address Register (CAAR) related to the 
   instruction cache are supported.  In general, of course, your code should 
   not address the cache registers directly.
   
   Because both emulated code and data reside in the PowerPC data cache, the 
   performance benefits associated with caching are still present.  Indeed, 
   the caching scheme used transparently by the 68LC040 Emulator results in a 
   higher level of software compatibility than is found on actual 680x0 
   microprocessors.  Some older versions of software that are incompatible 
   with the 68040 cache mechanism can run without problem under the emulator.
   
   Requests to invalidate the 68040 instruction cache are ignored by the 
   68LC040 Emulator.  However, you should continue to issue those calls in 
   order to remain compatible with 680x0-based Macintosh computers.  Moreover, 
   all cache flushing required for PowerPC code fragments is performed 
   automatically by the Code Fragment Manager. 

Presumably, the problem is *not* with the caching strategy of the '040.
I also have the same problem with a Centris 650/PPC.

Best,

Stu

-- 
Stuart A. Kurtz                                         stuart@cs.uchicago.edu
Associate Professor of Computer Science                         (312)-702-3493
University of Chicago
1100 E. 58th Street
Chicago, IL 60637
USA
