Newsgroups: comp.object.logic
Path: cantaloupe.srv.cs.cmu.edu!das-news2.harvard.edu!news2.near.net!howland.reston.ans.net!pipex!uunet!world!suzanne
From: suzanne@world.std.com (suzanne M southworth)
Subject: Unknown-Training
Message-ID: <CzI3HE.3sw@world.std.com>
Organization: The World Public Access UNIX, Brookline, MA
X-Newsreader: TIN [version 1.2 PL2]
Date: Sat, 19 Nov 1994 06:03:13 GMT
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Widman Associates Offers Training on Verilog, VHDL and Design for
Synthesis.

Language Training courses are one to four days long and will get you
on the track to creating top down designs using VHDL, Verilog, or
Synthesis. These are language and methodology classes taught by
designers for designers.

For further information, please send e-mail to: Suzanne Southworth @
Suzanne @ world.std.com, Director of Educational Services.


