Newsgroups: comp.robotics
Path: brunix!sgiblab!darwin.sura.net!haven.umd.edu!uunet!destroyer!cs.ubc.ca!newsserver.sfu.ca!sfu.ca!lye
From: lye@fraser.sfu.ca (Bill Lye)
Subject: Major Problem: 80C186 & 82C51A Solved!
Message-ID: <lye.734751803@sfu.ca>
Sender: news@sfu.ca
Organization: Simon Fraser University, Burnaby, B.C., Canada
References: <lye.734465494@sfu.ca> <12APR199311560714@reg.triumf.ca>
Date: Wed, 14 Apr 1993 01:43:23 GMT
Lines: 34

bomr@reg.triumf.ca (Rod Nussbaumer) writes:

[Rod's additions to my code deleted]

>The effect of these is similar to that of adding wait states to 
>the IO cycles.  This technique is standard fare in IO programing
>using '286s in PCs.  The symptoms you have described are consistant
>with the problems this technique is intended to solve.  I have probably
>added more JMPs than actually required to fix your problem.  You can
>experiment to find which ones can be deleted.  Hope this helps.

Thanks to all those of you who mailed me.  The problem is solved. 

As Rod (and others) pointed out, I need to add delays between writes to
the control register.  Specifically, I need to wait for a period of time
(not precisely determined) after a hardware reset (it is tied to an digital
output pin hanging off an HC273) or a software reset before I can
write to the device.  It looks like I need at least 3, possibly four
transitions of the CLK line after one of those operations.  It also
appears likely that I need at least one transition after any other write
to the control register.  The situation is (was?) complicated by the fact
that my processor clock is running at 8 MHz, while the clock going into
the 82C51A is 2 MHz.

The funny thing is that I initially tried to add waits between writes;
some code I saw long ago that controlled an 8250 and it's done all the 
time in the source code for Linux.  However, the 80C186's instruction
prefetch queue worked against me :( and the delays weren't long enough :(

So, once again, thanks soo much!
-- 
| Bill Lye, lye@sfu.ca    |  I can finally see a light at the end of |
| 5th year ENSC Undergrad |  the tunnel.  I just hope it's the end   |
| Simon Fraser University |  of the tunnel, not an oncoming train!   |
