Newsgroups: comp.robotics
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From: jfox@netcom.com (Jeff Fox)
Subject: Re: Forth's reputation
Message-ID: <jfoxD42n06.7CB@netcom.com>
Sender: jfox@netcom3.netcom.com
Organization: Netcom Online Communications Services (408-241-9760 login: guest)
References: <3heu6n$804@hopper.acm.org> <6.14254.723@spacebbs.com>
Date: Thu, 16 Feb 1995 02:31:18 GMT
Lines: 109

In article <6.14254.723@spacebbs.com> raymond.frye@spacebbs.com
           (Raymond Frye) writes:
>References: <3heu6n$804@hopper.acm.org> 
>
>AA> has now created a 100 MIPS Forth engine for only $20.
>
>I'll bite.
>
>Tell us about the engine.
> * RM 1.3 02229 * Or was that rabbits George.

This chip is a Forth engine in that the instruction set is basically
Forth, but the stacks are very tiny, so it is a really minimalistic
Forth chip.  For more information send me email or check out
http://www.dnai.com/~jfox

It is interesting that the fabricator says that this particlar
technology is fast enough to implement a 50Mhz flipflop, but
Chuck can build a 100 Mhz microprocessor using it.  :-)

This is the press release that was sent out by Dr. Ting at Offete
Enterprises Inc.

--------------------------------------------------------------------

Offete Enterprises, Inc.
1306 South B Street
San Mateo, CA 94402
Tel: (415) 574-8250  Fax: (415) 571-5004

Forth Multiprocessor Chip MuP21

San Mateo, CA (November, 1994)--Offete Enterprises announces successful
production of the high performance, multiprocessor chip MuP21.  MuP21 has a
21-bit CPU core, a memory coprocessor, and a video coprocessor, implemented
with 1.2 micron CMOS process.  It is targeted for applications in video
displays, CAD design, communication, video games, and embedded systems.

MuP21 employs a RISC-like instruction set with only 24 instructions.  20 bit
words are fetched from the DRAM memory at a rate of 20 MHz.  Each word contains
four 5-bit instructions, and the sustained peak execution rate is 80 MIPS.  The
video coprocessor works independently of the main CPU, and generates a 16-color
NTSC signal to display color images on a TV monitor from DRAM memory.

This highly integrated multiprocessor chip needs little supporting hardware to
form a low cost, low power, high performance computer.  A minimum configuration
consists of a MuP21, five 1Mx4 DRAM chips, and an 8-bit boot ROM.  An external
14 MHz crystal clock is needed only to synchronize the NTSC signal.

MuP21 is in a 40-pin DIP package.  Single unit price is $25, available
immediately from Offete Enterpriese.  A MuP21 Development System ($350) is
available for software developers.  It includes a small PC board with a MuP21
chip, 2.5 Mbytes of fast DRAM, an 128-Kbyte EPROM with boot and demo programs. 
A suite of assembler and utilities is supplied to help the user developing
applications on PC under DOS.  An unassembled kit (MuP21, a printed circuit
board, an 128K EPROM, software and documentation) is also available for
hobbists at $100. 

MuP21 was designed by Chuck Moore, the inventor of Forth computer language and
the designer of several high performance Forth microprocessors.  He has
developed a CAD system to layout and simulate microprocessors.  MuP21 is the
first chip designed and produced from this system.

Offete Enterprises specializes in Forth related hardware, software, and
publications.  It's president is Dr. C. H. Ting, an expert in Forth language
and Forth microprocessors.  He is also the editor of 'More on Forth Engines,' a
newsletter on the latest developments on Forth microprocessors and related
technology.

Offete Enterprises' Partial Product List

4010  	MuP21 Chips, $25
High performance, low power 20-bit microprocessor with memory coprocessor and
video coprocessor. 40-pin DIP package.  3-7V operation.  Peak execution speed
80 MIPS at 5V. 

1014	MuP21 Programming Manual, C. H. Ting-- $15.00
Primary reference for MuP21 microprocessor.  Architecture, instruction set,
video coprocessor programming, assembler, bootstrap code, Chuck Moores's OK
demonstration system, and his lectures on P21 and OK.

4011  	MuP21 Kit, $100
Include MuP21, a printed circuit board, a 128KB EPROM, manual and assembler
diskette.  Build your own stand-alone MuP21 development system.  Great for
evaluation and experimenting.

4012  	MuP21 Development System, $350
MuP21 system with 1Mx20 DRAM, 128KB EPROM, parallel I/O port, in an attractive
box.  Apply 5V power and it generates NTSC signals to drive a color TV monitor.
 MuP21 assembler and sample code included to guide application development.

4013  	MuP21 Advanced Assembler, Robert Patten, $50
Easy to use and powerful assembler for coding MuP21 applications.  Code are
organized in 1K word pages.  Local words in a page cannot be accidentally
referenced from other pages.  Global words can be referenced anywhere. 
Assembler generates up to 64KB of object code which can be burnt into EPROM to
boot MuP21.

4014  	MuP21 P21Forth, Jeff Fox, $50
An extended ANS Forth gives Forth users a familiar environment to develop
applications in Forth.  Include serial and parallel I/O ports, multitasker,
graphic utilities, assembler, and many other useful tools to support software
development. System and application source code included.

4118	More on Forth Engines, Volume 18, $20, June 1994.  P21 source code. 
Chuck Moore's OK4.3 and 4.4, Jeff Fox's P21 Forth 6/94, and C. H. Ting's eForth 
kernel, OKCHAR and layout printing to Deskjet 550C.


