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From: saed@engn.uwindsor.ca (Saed Aryan,13325,1100,g)
Subject: Inquiry on FPGA for NN HW 
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Organization: VLSI Research Group - University of Windsor
Date: Wed, 14 Aug 1996 20:13:32 GMT
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Dear readers of the AI-Neural Nets and FPGA newsgroups,

I would be very interested in knowing how mature current hardware designs of
Neural Nets are by using FPGA architectures. My request to fill out the
questionnaire below goes to anyone who has attempted or is attempting to design
NN hardware by FPGA. Both success cases and failures are welcome.

Perhaps you know of someone who is involved in designing NN HW on FPGA. Please
send them a copy of this mail. Your assistance is much appreciated.

The results of this inquiry will be posted on both newsgroups. But for now,
the follow-up has been set to the AI-Neural Nets newsgroup. If you wish to contribute to the questionnaire, send your reply by e-mail to the undersigned,
and feel free with any additional comments.

After approximately 14 days I will summarize your responses and post the
results. Perhaps we could delay a possible discussion until the final
outcome is posted. Of course, if more entries come in later, I will
rewrite the summary and post it again after some reasonable time.


Thank you very much in advance,

Aryan Saed    (saed@engn.uwindsor.ca)
Univ. of Windsor, Dept. of Electrical Engineering, Windsor ON, Canada



QUESTIONNAIRE-------------------------------------------------------------

Please copy this section in your reply and include each answer right after
the question. There are 18 Questions, brief answers are sufficient, long ones
are welcome.
 

---- About the FPGA devices

 What type of FPGA did you use (manufacturer, type)? e.g. Xilinx 4002
 How many FPGA's did you cluster? e.g. 10 together or just one
 What throughputrate did you achieve (bit parallel, bit serial) ?
  e.g. 20Mbits/s serial , 1.1Mbyte (16bits parallel)
 What percentage of utilization did you achieve or 
  how many blocks were available, how many used (switching blocks, logic blocks,
  input/output blocks)? e.g. 24 of 98 CLB's per device
 What type of functional block would you consider usefull for a NN tailored
  FPGA?


 Your additional comments:



---- About the Neural Network

 What type of Neural Network did you implement? e.g. feed forward network
 Precisely which part of the NN did you implement? e.g. only weight
  multiplication or complete 4:6:2 Network
 How much on-device learning did you include? e.g. gradient descents included
 Which word size did you use, which number representation? e.g. 8bit unsigned x
  8bit signed = 16 bit binary
 How did you realize the activation function? e.g look-up table
 Did you implement a pipe line?
 What concessions did you make, what limitations were made on the NN in order
  to make it suitable for FPGA implementations? e.g. hard limiting activation
 What type of NN would you consider distinctively suitable for FPGA implementation?
 
 Your additional comments:




---- About your publications

 Have you published or presented your design and results (where, when)?
  e.g. Encyclopedia Britannica 1994 (just kidding)




----  - OPTIONAL - About your experience in this matter 

(the following answers, if provided, will NOT be linked to your name/organization in the outcome )

 Were you satisfied with the overall design, in particular with respect to the
  performance speed, circuit complexity, interconnectibility of neurons, etc?
 Were you limited in the choice of FPGA's?
 Would you prefer to use a different device in future? Why?
 Do you have experience with other forms of NN implementations (Software,
  hardware: accelerator cards, analog/digital implementation)?

 Your additional comments:



---- About yourself ( so that I can thank you and give you credit)

 Your Name:
 Your Organization:
 Your E-mail (please include):

 Shall I include your name and/or organization in the credits? How about your
  e-mail?



Thank you very much for your time and effort! 
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