Newsgroups: comp.ai.neural-nets
Path: cantaloupe.srv.cs.cmu.edu!das-news2.harvard.edu!news2.near.net!news.mathworks.com!hookup!swrinde!howland.reston.ans.net!ix.netcom.com!netcom.com!park
From: park@netcom.com (Bill Park)
Subject: Re: hardware implementation of a neural network
Message-ID: <parkCyIFD9.EAo@netcom.com>
Followup-To: comp.ai.neural-nets
Summary: Intel 80170NX and Ni1000, National Neufuz, Neural Semiconductor
Cc: r7kf@unb.ca
Organization: NETCOM On-line Communication Services (408 261-4700 guest)
References: <38r1jp$6ga@sol.sun.csd.unb.ca>
Date: Sun, 30 Oct 1994 23:46:20 GMT
Lines: 117

In article <38r1jp$6ga@sol.sun.csd.unb.ca> you write:

> I am going to implement a neural network controller in hardware for a
> prosthetic arm. I am just starting out and am looking for dedicated
> hardware that could do this. Does anyone know who I could contact or
> know what devices (chips) I could use?
> 
> Willem J. Atsma
> Institute of Biomedical Engineering
> University of New Brunswick, Canada
> e-mail: r7kf@unb.ca

Intel developed two neural net chips, but for some reason seems to
have licensed distribution rights to two other companies.

	Ni1000 Recognition Accelerator, available only from Nestor ...

		Cheryl Grove, Director of Sales and Marketing
		Embedded Systems
		Nestor, Inc.
		One Richmond Square
		Providence RI 02906
		(401)331-9640 tel
		(401)331-7319 fax

	80170NX Electrically Trainable Analog Neural Network (ETANN),
	available only from ... 

		California Scientific Software
		10024 Newton Road
		Nevada City, CA  95959
		(916)478-9040
		(800)284-8112 sales
		(916)478-9035 technical support
		(916)478-9041 fax
		(916)478-9042 bbs

	Intel published a very informative 42-page data booklet on it:

	80170NX Electrically Trainable Analog Neural Network
	Order number 290408-003, March 1993.

	The front page of this booklet carries the word "experimental."

National Semiconductor offers the NeuFuz fuzzy logic development
system, which delivers executable code for National's COP8 family of
8-bit microcontrollers.

	Naveed Khan
	National Semiconductor
	Intelligent Systems Group
	2900 Semiconductor Drive
	P.O. Box 58090, M/S E-255
	Santa Clara, CA  95052-8090
	(408)732-6107 FAX

My copy of the NeuFuz brochure is also dated March 1993, and carries
the word "preliminary" on its front page.

The Hecht-Nielsen Company (San Diego, CA) offers a coprocessor board,
but I think it's based on a conventional digital signal processing
chip such as the Intel i860.  Still, most of the processing in an
artificial neuron is just multiply-and-accumulate, which DSPs are
really good at.  I suppose you could even evaluate the nonlinear
"squashing" function as a table look up in a way that is also
well suited to the DSP's abilities.  

Neural Semiconductor (Carlsbad, CA) claims that its NU32/SU3232 neural
net chip can process 100,000 patterns (not connections) per second.

Inmos' Transputers (made in the U.K.) are frequently used to implement
neural networks.  Nestor used to sell the German Hema Transputer
board, and may still.

Motorola, NEC, and Fujitsu were also reported to be developing neural
network chips a bout 5 years ago.  I don't know if any of them got to
market.

Note that you generally need the fancy hardware most for training,
since that involves about three passes over a neuron per example,
while using a trained net without learning only requires a single
pass.  That's assuming your are using a simple freedforward network,
not one of the more exotic nets -- Hopfield, ART, etc. -- that
implement a dynamic process, so that you have to woit for the data to
make many passes through each neuron before the net settles down
enough for you to read out an answer.  Also, training requires
processing large numbers of examples -- often thousands or tens of
thousands -- and the main reason you need speed then is so you don't
have to twiddle your thumbs in the lab for hours to see if the damned
thing is going to learn or not this time.  In your application, the
chip will only have to process data at the rate determined by the
dynamics of the prosthetic arm.  You may find that a quite modest
processor -- even an ordinary microprocessor -- will do the job
nicely, even if you find you need a $50,000 workstation with a special
purpose neural net coprocessor board to train on.  You may also find
you can use multiple chips working in parallel in the arm, further
decreasing throughput requirements for any one chip.

You will probably want a military quality rating on any equipment you
plan to field.  Professor Steven Jacobsen at the University of Utah
(maybe at Nova Robotics, too) has been over that road several times.
As I recall, he reported that one of his amputee testers took a shower
wearing the Utah arm!

In my experience, glossy brochures prepared by a marketing deparment
are rarely a good basis for an engineering decision.  I strongly
recommend you get the detailed technical specifications on each
neurochip you may use, then let your best wirehead study them and tell
you what he thinks would be their pros and cons for use in the arm.
And try to talk to other "satisfied customers" who are using the
product in an application that is as close as possible to your own.

Best of luck,

Bill Park
=========
-- 
Grandpaw Bill's High Technology Consulting & Live Bait, Inc.
